PDF AT73C209 Data sheet ( Hoja de datos )

Número de pieza	AT73C209
Descripción	Power Management And Analog Companions
Fabricantes	ATMEL Corporation
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Features • PowwwerwM.DaantaaSgheemet4eUn.tcom – Supply Input from USB or 1x Disposal Battery (Alkaline, NimH, NiCd) – Input Voltage Range: 0.9V to 1.8V – 2.7V/2.9V/3.1V/3.3V - 100 mA Step-Up DC/DC Converter for Main Supply – 2.7V to 3.5V (100mV step) - 150 mA LDO from USB supply – 2.4V to 3.0V (200mV step) - 60 mA LDO for Analog Supply – Reset Generator – SPI Interface and Internal Programming Registers – Dynamic Power Management – Very Low Quiescent Current Operation • Stereo Audio DAC – Programmable Stereo Audio DAC (16-bits, 18-bits or 20-bits) – 93 dB SNR Playback Stereo Channels – 32 Ohm/20 mW Stereo Headset Drivers with Master Volume and Mute Controls – Stereo Line Level Input with Volume Control/Mute and Playback through the Headset Driver – Microphone Preamplifier – Stereo, Mono and Reverse Stereo Mixer – Left/Right Speaker Short-Circuit Detection Flag – 8, 11.024, 16, 22.05, 24, 32, 44.1 and 48 kHz Sampling Rates – 256x or 384xFs Master Clock Frequency – I2S Serial Audio Interface – Low Power Operation • Applications: – Ideally Suited to Interface with Atmel’s AT8xC51SNDxC MP3 Microcontroller – Portable Music Players, Digital Cameras, CD Players, Handheld GPS Power Management and Analog Companions (PMAAC) AT73C209 Audio and Power Management 1. Description The AT73C209 is a fully integrated, low cost, combined Stereo Audio DAC and Power Management Circuit targeted for battery powered devices such as MP3 players in “walkman” format or “mass storage” USB format. The stereo DAC section is a complete high performance, stereo audio digital-to-ana- log converter delivering a 93 dB dynamic range. It comprises a multibit sigma-delta modulator with dither, continuous time analog filters and analog output drive circuitry. This architecture provides a high insensitivity to clock jitter. The digital interpolation fil- ter increases the sample rate by a factor of 8, using 3 linear phase half-band cascaded filters, followed by a first order SINC interpolator with a sample-rate factor of 8. This filter eliminates the images of baseband audio, retaining only the image at 64x the input sample rate, which is eliminated by the analog post filter. Optionally, a dither signal can be added that reduces possible noise tones at the output. However, the use of a multibit sigma-delta modulator provides extremely low noise tone energy. Master clock is 256 or 384 times the input data rate, allowing multiple choice of input data rate up to 48 kHz, including standard audio rates of 48, 44.1, 32, 16 and 8 kHz. The DAC section also comprises volume and mute control and can be simultaneously played back directly on the line outputs and through a 32-Ohms stereo headset. 6365A–PMAAC–12-Mar-08 1 page AT73C209 4. Components List www.DataSheet4U.com Table 4-1. Components List Reference Value C1 22 µF C2 2.2 µF / 10V C3 470 nF / 10V C4 470 nF / 10V C5 100 µF / 6.3V C6 100 µF / 6.3V C7 1 µF / 6.3V C8 100 nF / 16V C9 1 µF / 6.3V C10 10 µF / 6.3V C11 1 µF / 6.3V C12 10 µF / 6.3V C13 1 µF / 6.3V C14 22 µF / 4V D1 -- L1 10 µH /550mA R1 0.1 Ohms R2 2.2 kOhms SW1 Push Button Techno Tantalum Ceramic Ceramic Ceramic Ceramic Ceramic Ceramic Ceramic Ceramic Ceramic Ceramic Ceramic Ceramic Ceramic Schottky 1% 5% N/A Size Case A 0603 0402 0402 1210 1210 0402 0402 0402 0402 0402 0603 0402 0805 1812 -- 0402 N/A Manufacturer & Reference (AVX) or equivalent C1608X5R1A225MT (TDK) or GRM188R61A225 (Murata) C1005X5R1A474KT (TDK) or GRM155F51A474 (Murata) C1005X5R1A474KT (TDK) or GRM155F51A474 (Murata) C3225X5R0J107MT (TDK) or GRM32ER60J107 (Murata) C3225X5R0J107MT (TDK) or GRM32ER60J107 (Murata) C1005X5R0J105KT (TDK) or GRM155R60J105 (Murata) C1005X5R1C104KT (TDK) or GRM155F51C104 (Murata) C1005X5R0J105KT (TDK) or GRM155R60J105 (Murata) C1608X5R0J106MT (TDK) or GRM188R60G106 (Murata) C1005X5R0J105KT (TDK) or GRM155R60J105 (Murata) C1608X5R0J106MT (TDK) or GRM188R60G106 (Murata) C1005X5R0J105KT (TDK) or GRM155R60J105 (Murata) C2012X5R0J226MT (TDK) or GRM21BR60J226 (Murata) MBRA120LT3 (ON Semiconductors) or equivalent NLC453232T-100K-PF (TDK) or LQH43CN100K03 (Murata) in 0805 Case or can be made by PCB tracks Series DSTMxx (APEM COMPONENTS) or equivalent 6365A–PMAAC–12-Mar-08 5 5 Page AT73C209 8.5.1 DAC Control Register Regiwswtewr.DNaatamShee:et4U.coDmAC_CTRL Access Type: Read/Write Address: 0x00 7 RSRV1 6 RSRV2 Register (0x00): DAC Control 5 ONDACR 4 ONDACL 3 ONLNOR 2 ONLNOL Bit Name 0 ONLNIL 1 ONLNIR 2 ONLNOL 3 ONLNOR 4 ONDACL 5 ONDACR 6 RSRV2 7 RSRV1 Description Left channel line in amplifier (L to power down, H to power up) Right channel line in amplifier (L to power down, H to power up) Left channel line out driver (L to power down, H to power up) Right channel line out driver (L to power down, H to power up) Left channel DAC (L to power down, H to power up) Right channel DAC (L to power down, H to power up) Reserved Bit Reserved Bit 1 ONLNIR 0 ONLNIL Reset Value ONLNIL = 0 ONLNIR = 0 ONLNOL = 0 ONLNOR = 0 ONDACL = 0 ONDACR = 0 0 0 6365A–PMAAC–12-Mar-08 11 11 Page

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