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PDF AT73C213B Data sheet ( Hoja de datos )
| Número de pieza | AT73C213B | |
| Descripción | Power Management and Analog Companions | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Stewrewow.ADuatdaiSohDeeAt4CU.com
– 2.7V to 3.3V Analog Supply Operation
– 2.4V to 3.3V Digital Supply Operation
– 20-bit Stereo Audio DAC
– 93 dB SNR Playback Stereo Channels
– 32 Ohm/20 mW Stereo Headset Drivers with Master Volume and Mute Controls
– Stereo Line Level Input with Volume Control/mute and Playback through the
Headset Drivers
– Differential Monaural Auxiliary Input, with Volume Control/mute and Playback
through the Headset Drivers
– Accepts Mixed Signals from All Signal Paths (Line Inputs, External Mono and DAC
Output)
– 8, 11.024, 16, 22.05, 24, 32, 44.1 and 48 kHz Sampling Rates
– 256x or 384xFs Master Clock Frequency
– I2S Serial Audio Interface
• Mono Audio Power Amplifier
– Supply Input from Main Li-Ion Battery
– 440mW on 8 Ohm Load
– Low Power Mode for Earphone
– Programmable Volume Control (-22 to +20 dB)
– Fully Differential Structure, Input and Output
– 8 mA Drain Current in Full Power Mode
– Power-down mode (Consumption Less than 2 µA)
– Minimum External Components (Direct Connection of the Loudspeaker)
• Applications: Mobile Phones, Digital Cameras, PDAs, SmartPhones, DECT Phones,
Music Players
Power
Management
and Analog
Companions
(PMAAC)
AT73C213B
Audio Interface
for Portable
Handsets
1. Description
The AT73C213B is a fully integrated, low-cost, combined stereo audio DAC and audio
power amplifier circuit targeted for Li-Ion or Ni-Mh battery powered devices such as
mobile phones, smartphones, PDA, DECT phones, digital still cameras, music players
or any other type of handheld device where an audio interface is needed.
The stereo DAC section is a complete high performance, stereo audio digital-to-ana-
log converter delivering a 93 dB dynamic range. It comprises a multibit sigma-delta
modulator with dither, continuous time analog filters and analog output drive circuitry.
This architecture provides a high insensitivity to clock jitter. The digital interpolation fil-
ter increases the sample rate by a factor of 8 using 3 linear phase half-band filters
cascaded, followed by a first order SINC interpolator with a factor of 8. This filter elim-
inates the images of baseband audio, retaining only the image at 64x the input sample
rate, which is eliminated by the analog post filter. Optionally, a dither signal can be
added that reduces possible noise tones at the output. However, the use of a multibit
sigma-delta modulator already provides extremely low noise tone energy.
Master clock is from 256 or 384 times the input data rate, allowing choice of input data
rate up to 50 kHz, including standard audio rates of 48, 44.1, 32, 16 and 8 kHz.
The DAC section is followed by a volume and mute control and can be simultaneously
played back directly through a stereo 32 Ohm headset pair of drivers.
6407A–PMAAC–22-Apr-08
1 page  
AT73C213B
6. Audio Power Amplifier
www.DataSheet4U.com
6.1 Electrical Specifications
VBAT = 3.6V, TA = 25°C unless otherwise noted. High power mode, 100 nF capacitor connected between CBP and GND
Audio, load = 8 Ohms.
Table 6-1.
Symbol
VDD
IDD
IDDstby
VCbp
VOS
ZIN
ZLFP
ZLLP
CL
PSRR
BWmin
BWmax
tUP
VN
THDHP
THDLP
Pmax
GACC
GSTEP
Audio Power Amplifier Electrical Specifications (General Conditions: VDD = 3.6V,TA = 25°C)
Parameter
Conditions
Min Typ Max
Supply voltage
Unloaded, 100 nF decoupling capacitor
to GND
3
3.6 5.5
Quiescent current
Inputs shorted, no load
68
Standby current
2
DC reference
VDD/2
Output differential offset
Full gain
-20 0 20
Input impedance
Active state
12K 20k 30k
Output load
Full Power mode
6 8 32
Output load
Low-Power mode, including R1
100 150 300
Capacitive load
100
Power supply rejection ratio 200 to 2 kHz differential output
60
Low Frequency Cutoff
1 kHz reference frequency
3 dB attenuation
470 nF input coupling capacitors
50
High Frequency Cutoff
1 KHz reference frequency
3 dB attenuation
20
Output setup time
Off to on mode
Voltage already settled
Input capacitors precharged
10
Output noise
Max gain, A weighted
120 500
Output distortion
High power mode, 1 kHz,
Pout = 100mW, gain = 0dB
0.3
Output distortion
Low power mode,1KHz, V
out = 100m Vpp, Max gain, load 8 ohms
in series with 200 ohms
1
Maximum power
High power mode, 1 KHz,
Vout = 100 mVpp, Max gain, load 8
ohms in series with 200 ohms
440
Overall Gain accuracy
-2 0 2
Gain Step Accuracy
-0.7 0 0.7
Unit
V
mA
µA
V
mV
Ohm
Ohm
Ohm
pF
dB
Hz
kHz
ms
µVRMS
%
%
mW
dB
dB
6407A–PMAAC–22-Apr-08
5
5 Page 
AT73C213B
7.4 Timing Specifications
www.DataSheet4U.com The timing constraints of the data interface are described in Figure 7-7 and Table 7-2 below.
Figure 7-7. Data Interface Timing Diagram
1
BCLK
20
M/2+1
M
ts1 th1
LRFS
SDIN
ts2 th2
Table 7-2. Data Interface Timing Parameters
Parameter
Min Typ Max Unit
ts1 LRFS set-up time before BCLK rising edge
10
ns
th1 LRFS hold time after BCLK rising edge
10
ns
ts2 DIN set-up time before BCLK rising edge
10
ns
th2 DIN hold time after BCLK rising edge
10
ns
6407A–PMAAC–22-Apr-08
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AT73C213B.PDF ] | |
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