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PDF ATR2730 Data sheet ( Hoja de datos )

Número de pieza ATR2730
Descripción L-band Down-converter
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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Features
SuppwlywwVo.DltaatagSeh:e8e.t54VU.com
RF Frequency Range: 1400 MHz to 1550 MHz
IF Frequency Range: 150 MHz to 250 MHz
Enhanced IM3 Rejection
Overall Gain Control Range: 30 dB Typically
DSB Noise Figure: 10 dB
Gain-controlled Amplifier and L-band Mixer
Power-down Function for the Analog Part
On-chip Gain-control Circuitry
On-chip VCO, Typical Frequency 1261.568 MHz
Internal VCO Can Be Overdriven by an External LO
On-chip Frequency Synthesizer
– Fixed LO Divider Factor: 2464
– Nine Selectable Reference Divider Factors: 32, 33, 35, 36, 48, 49, 63, 64, 65
– A Reference Oscillator (Can Be Overdriven by an External Reference Signal)
– Tri-state Phase Detector with Programmable Charge Pump
– Programmable Deactivation of Tuning Output
– Lock-status Indication
– Test Interface
1. Description
The ATR2730 is a monolithically integrated L-band down-converter circuit fabricated
with Atmel®’s advanced UHF5S technology. This IC covers all functions of an L-band
down-converter in a DAB receiver. The device includes a gain-controlled amplifier, a
gain-controlled mixer, an output buffer, a gain control block, a power-save function for
the analog part, an L-band oscillator, and a complete frequency synthesizer unit. The
frequency synthesizer block consists of a reference oscillator/buffer, a reference
divider, an RF divider, a tri-state phase detector, a loop filter amplifier, a lock detector,
a programmable charge pump, a test interface, and a control interface.
L-band
Down-converter
for DAB
Receivers
ATR2730
Preliminary
4903C–DAB–03/07

1 page




ATR2730 pdf
ATR2730 [Preliminary]
3. Functional Description
www.DataSheet4U.com The ATR2730 is an L-band down-converter circuit covering a gain-controlled amplifier, a
gain-controlled mixer, an output buffer, a gain control circuitry, an L-band oscillator, and a fre-
quency synthesizer block. Designed for applications in a DAB receiver, the circuit down-converts
incoming L-band signals in the frequency range of 1452 MHz to 1492 MHz to an IF frequency in
the range of 190 MHz to 230 MHz, which can be handled by a subsequent DAB tuner. A block
diagram of this circuit is shown in Figure 1-1 on page 2.
3.1 Gain-controlled Amplifier
RF signals applied to the RF input pin are amplified by a gain-controlled amplifier. The comple-
mentary pin NRF is not internally blocked; it is recommended to block this pin carefully by an
external capacitor. The gain-control voltage is generated by internal gain-control circuitry. The
output signal of this amplifier is fed to a gain-controlled mixer.
3.2 Gain-controlled Mixer and Output Buffer
The purpose of this mixer is to down-convert the L-band signal in the frequency range of
1452 MHz to 1492 MHz to an IF frequency in the range of about 190 MHz to 230 MHz. Like the
amplifier, the gain of the mixer is controlled by the gain-control circuitry. The IF signal is buffered
and filtered by a one-pole low-pass filter at a 3 dB frequency of about 500 MHz, and then it is fed
to the single-ended output pin IF.
3.3 Gain-control Circuitry
The gain-control circuitry measures the signal power, compares it with a certain power level and
generates control voltages for the gain-controlled amplifier and mixer. An equivalent circuit of
this functional block is shown in Figure 10-1 on page 14.
In order to meet this functionality, the output signal of the buffer amplifier is weakly band-pass fil-
tered (transition range of about 60 MHz to 550 MHz), rectified, low-pass filtered, and fed to a
comparator whose threshold can be defined by an external resistor, RTH, at pin TH. By varying
the value of this resistor, a power threshold of about –33 dBm to –20 dBm can be selected. In
order to achieve a good intermodulation ratio, it is recommended to keep the power threshold
below –25 dBm. An appropriate application is shown in Figure 8-1 on page 12. Depending on
the selection made by the comparator, a charge pump charges or discharges a capacitor which
is applied to the AGC pin. By varying this capacitor, different time constants of the AGC loop can
be realized. The voltage arising at the AGC pin is used to control the gain setting of the
gain-controlled amplifier and mixer. The voltage at pin AGC is in the range of 5.75V for maxi-
mum gain and 0.3V for minimum gain. This voltage can be use to control a dual-gate GaAs-FET
in front of the ATR2730 to achieve an extended AGC range. By applying an external voltage to
the AGC pin, the internal AGC loop can be overdriven.
4903C–DAB–03/07
5

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ATR2730 arduino
ATR2730 [Preliminary]
7. Electrical Characteristics (Continued)
Operatiwngwwco.DnadtiatiSohnese:t4VUC.Cco=m8.5V, Tamb = 25° C unless otherwise specified. (See application circuit Figure 10-3 on page 15.)
No. Parameters
Test Conditions
Pin Symbol Min. Typ. Max. Unit
Type*
7.2 Reference divide factor
SI1 = GND, SI2 = GND
SI1 = GND, SI2 = VCC
SI1 = GND, SI2 = open
SI1 = VCC, SI2 = GND
SI1 = VCC, SI2 = VCC
SI1 = VCC, SI2 = open
SI1 = open, SI2 = GND
SI1 = open, SI2 = VCC
SI1 = open, SI2 = open
SFref
48
33
36
49
32
35
64
63
65
A
7.3 Input frequency range
7.4 Input sensitivity
7.5 Maximum input signal
7.6 Input impedance
8 Phase Detector
Single-ended
fref 5
50 MHz C
15 Vrefs
30 mVrms C
15 Vrefmax
300
mVrms
C
Zref
2.7k || 2.5
k|| pF D
Pin CI connected to GND
8.1 Charge-pump current
8.2 Output voltage PD
Pin CI connected to VCC
Pin CI connected to VCC/2
Pin CI open
8.3 Internal reference frequency
8.4 Typical tuning voltage range
9 Lock Indication PLCK
13
13
12
14
IPD2 160 200 240 µA A
IPD1 240 300 360 µA A
IPD1,tri
100 nA
A
VPD 0.3 V A
fPD 512 kHz B
Vtune
0.3
5 VC
9.1 Leakage current
9.2 Saturation voltage
10 Control Inputs SI
VPLCK = 5.5V
IPLCK = 0.25 mA
2 and 27
IPLCK
VPLCK,sat
10 µA A
0.5 V A
10.1
10.2 Input voltage
10.3
11 Control Input CI
Pin connected to GND
Pin open
Pin connected to VCC
VL 0
0.1 VCC A
VM Open
A
VH 0.9
1
VCC
A
10
11.1
11.2
Input voltage
11.3
11.4
12 Test Interface TI
Pin connected to GND
Pin connected to VCC/2
Pin open
Pin connected to VCC
VL 0
0.1 VCC A
VM
0.5
VCC
A
Vopen
Open
A
VH 0.9
1
VCC
A
11
12.1 Reference test frequency
12.2 LO test frequency
12.3 Voltage swing
13 Power-save Mode PSM
Pin CI open
Pin CI = VCC/2
Rload 1 M, Cload 15 pF,
Pin CI open or VCC/2
1
ftest,ref
ftest,LO
Vsw
512 kHz B
512 kHz B
400
mVpp
C
13.1
PSM not active
VPSM
0.6
13.2 PSM active
VPSM
2.0
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
V
V
A
A
4903C–DAB–03/07
11

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