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PDF 37VF020 Data sheet ( Hoja de datos )

Número de pieza 37VF020
Descripción SST37VF020
Fabricantes Silicon Storage Technology 
Logotipo Silicon Storage Technology Logotipo



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No Preview Available ! 37VF020 Hoja de datos, Descripción, Manual

512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit (x8)
Many-Time Programmable Flash
SST37VF512 / SST37VF010 / SST37VF020 / SST37VF040
www.DataSheeStS4TU3.7cVoFm512 / 010 / 020 / 0402.7V-Read 512Kb / 1Mb / 2Mb / 4Mb (x8) MTP flash memories
FEATURES:
Data Sheet
• Organized as 64K x8 / 128K x8 / 256K x8 / 512K x8
• 2.7-3.6V Read Operation
• Superior Reliability
– Endurance: At least 1000 Cycles
– Greater than 100 years Data Retention
Low Power Consumption:
Active Current: 10 mA (typical)
Standby Current: 2 µA (typical)
Fast Read Access Time:
70 ns
90 ns
Latched Address and Data
Fast Byte-Program Operation:
Byte-Program Time: 10 µs (typical)
Chip Program Time:
0.6 seconds (typical) for SST37VF512
1.2 seconds (typical) for SST37VF010
2.4 seconds (typical) for SST37VF020
4.8 seconds (typical) for SST37VF040
Electrical Erase Using Programmer
Does not require UV source
Chip-Erase Time: 100 ms (typical)
CMOS I/O Compatibility
JEDEC Standard Byte-wide Flash
EEPROM Pinouts
Packages Available
32-pin PLCC
32-pin TSOP (8mm x 14mm)
32-pin PDIP
PRODUCT DESCRIPTION
The SST37VF512/010/020/040 devices are 64K x8 / 128K
x8 / 256K x8 / 512K x8 CMOS, Many-Time Programmable
(MTP), low cost flash, manufactured with SSTs proprietary,
high performance CMOS SuperFlash technology. The
split-gate cell design and thick oxide tunneling injector
attain better reliability and manufacturability compared with
alternate approaches. The SST37VF512/010/020/040 can
be electrically erased and programmed at least 1000 times
using an external programmer, e.g., to change the contents
of devices in inventory. The SST37VF512/010/020/040
have to be erased prior to programming. These devices
conform to JEDEC standard pinouts for byte-wide flash
memories.
Featuring high performance Byte-Program, the
SST37VF512/010/020/040 provide a typical Byte-Pro-
gram time of 10 µs. Designed, manufactured, and tested
for a wide spectrum of applications, these devices are
offered with an endurance of at least 1000 cycles. Data
retention is rated at greater than 100 years.
The SST37VF512/010/020/040 are suited for applications
that require infrequent writes and low power nonvolatile
storage. These devices will improve flexibility, efficiency,
and performance while matching the low cost in nonvolatile
applications that currently use UV-EPROMs, OTPs, and
mask ROMs.
To meet surface mount and conventional through hole
requirements, the SST37VF512/010/020/040 are offered in
32-pin PLCC, TSOP, and PDIP packages. See Figures 1,
2, and 3 for pinouts.
Device Operation
The SST37VF512/010/020/040 devices are nonvolatile
memory solutions that can be used instead of standard
flash devices if in-system programmability is not required. It
is functionally (Read) and pin compatible with industry
standard flash products.The device supports electrical
Erase operation via an external programmer.
Read
The Read operation of the SST37VF512/010/020/040 is
controlled by CE# and OE#. Both CE# and OE# have to be
low for the system to obtain data from the outputs. Once
the address is stable, the address access time is equal to
the delay from CE# to output (TCE). Data is available at the
output after a delay of TOE from the falling edge of OE#,
assuming the CE# pin has been low and the addresses
have been stable for at least TCE - TOE. When the CE# pin
is high, the chip is deselected and a standby current of only
10 µA (typical) is consumed. OE# is the output control and
is used to gate data from the output pins. The data bus is in
high impedance state when either CE# or OE# is VIH.
Refer to Figure 4 for the timing diagram.
©2001 Silicon Storage Technology, Inc.
S71151-02-000 5/01
397
1
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
MTP is a trademark of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.

1 page




37VF020 pdf
512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST37VF512 / SST37VF010 / SST37VF020 / SST37VF040
Dwawtwa.DSahtaeSehteet4U.com
TABLE 3: OPERATION MODES SELECTION
Mode
CE# WE# A9
OE# DQ
Address
Read
VIL VIH AIN
VIL DOUT
AIN
Output Disable
VIL X X
VIH High Z
AIN
Standby
VIH X X
X High Z
X
Chip-Erase
VIL VIL VH
VH High Z
X
Byte-Program
VIL VIL AIN
VH DIN
AIN
Program/Erase Inhibit
X VIH X
X High Z
X
Product Identification
X X X VIL or VIH High Z/ DOUT
VIL VIH VH
VIL Manufacturers ID (BFH)
Device ID1
X
AMS2 - A1 = VIL, A0 = VIL
AMS2 - A1 = VIL, A0 = VIH
1. Device ID = C4H for SST37VF512, C5H for SST37VF020, C6H for SST37VF020, and C2H for SST37VF040
2. AMS = Most significant address
AMS = A15 for SST37VF512, A16 for SST37VF010, A17 for SST37VF020, and A18 for SST37VF040
Note: X = VIL or VIH (or VH in case of OE# and A9)
VH = 12V±5%
T3.1 397
Absolute Maximum Stress Ratings (Applied conditions greater than those listed under Absolute Maximum
Stress Ratingsmay cause permanent damage to the device. This is a stress rating only and functional operation
of the device at these conditions or conditions greater than those defined in the operational sections of this data
sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.)
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
D. C. Voltage on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VDD + 0.5V
Transient Voltage (<20 ns) on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to VDD + 1.0V
Voltage on A9 Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 13.2V
Package Power Dissipation Capability (Ta = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0W
Through Hold Lead Soldering Temperature (10 Seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
Surface Mount Lead Soldering Temperature (3 Seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240°C
Output Short Circuit Current1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
1. Outputs shorted for no more than one second. No more than one output shorted at a time.
OPERATING RANGE
Range
Commercial
Ambient Temp
0°C to +70°C
VDD
2.7-3.6V
AC CONDITIONS OF TEST
Input Rise/Fall Time . . . . . . . . . . . . . . . 5 ns
Output Load . . . . . . . . . . . . . . . . . . . . . CL = 100 pF
See Figures 7 and 8
©2001 Silicon Storage Technology, Inc.
5
S71151-02-000 5/01 397

5 Page





37VF020 arduino
512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST37VF512 / SST37VF010 / SST37VF020 / SST37VF040
Dwawtwa.DSahtaeSehteet4U.com
Start
A9 = VH, OE# = VH
CE# = VIL
Erase 100ms pulse
(WE# = VIL)
WE# = VIH
OE#/A9 = VIL or VIH
Wait TVR Recovery Time
Read Device
Compare all
bytes to FF
Yes
Device Passed
No
Device Failed
FIGURE 9: CHIP-ERASE ALGORITHM
397 ILL F08.0
©2001 Silicon Storage Technology, Inc.
11
S71151-02-000 5/01 397

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