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부품번호 | FOD0710 기능 |
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기능 | (FOD07xx) 25Mbit/sec Logic Gate Optocoupler | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 12 페이지수
www.DataSheet4U.com
FOD0721, FOD0720, FOD0710
High CMR, 25Mbit/sec Logic Gate Optocoupler
May 2008
Features
■ 20kV/µs minimum CMR
■ 40ns max. propagation delay
■ Data Rate, Non-Return Zero Coding
– 25Mbit/sec (FOD0721 and FOD0720)
– 12.5Mbit/sec (FOD0710)
■ Pulse Width Distortion
– 6ns (FOD0721)
– 8ns (FOD0720 and FOD0710)
■ +5V CMOS compatibility
■ Extended industrial temperate range
– -40 to 100°C temperature range
■ Safety and regulatory approvals
– UL1577, 3750 VACrms for 1 min. (File #E90700,
Volume 2)
– IEC60747-5-2 pending approval
Applications
■ Industrial fieldbus communications
– Profibus, DeviceNet, CAN, RS485
■ Programmable logic control
■ Isolated data acquisition system
Description
The FOD0721/0720/0710 family utilizes Fairchild’s
patented coplanar packaging technology, Optoplanar®,
and optimized IC design to guarantee minimum 20kV/µs
Common Mode Noise Rejection (CMR) rating.
These high-speed logic gate optocouplers consist of a
high-speed AlGaAs LED driven by a CMOS IC coupled
to a CMOS detector IC, comprising an integrated photo-
diode, a high-speed transimpedance amplifier and a
voltage comparator with an output driver. The CMOS
technology coupled to the high efficiency of the LED
achieves low power consumption as well as very high
speed (40ns propagation delay, 6ns pulse width
distortion).
These devices are available in a compact 8-pin small
outline package.
Package Dimensions
0.164 (4.16)
0.144 (3.66)
0.202 (5.13)
0.182 (4.63)
0.143 (3.63)
0.123 (3.13)
0.010 (0.25)
0.006 (0.16)
0.021 (0.53)
0.011 (0.28)
0.008 (0.20)
0.003 (0.08)
0.050 (1.27)
TYP
0.244 (6.19)
0.224 (5.69)
Lead Coplanarity : 0.004 (0.10) MAX
Note:
All dimensions are in inches (millimeters)
©2004 Fairchild Semiconductor Corporation
FOD0721, FOD0720, FOD0710 Rev. 1.0.7
www.fairchildsemi.com
Electrical Characteristics (TA = -40°C to 100°C and 4.5V ≤ VDD ≤ 5.5V, all typicals are at TA = 25°C, VDD = 5V)
www.DSaytamSbheoelt4U.com
Parameter
Test Conditions Min. Typ. Max. Unit
INPUT CHARACTERISTICS
IDD1L Logic Low Input Supply Current
IDD1H Logic High Input Supply Current
IDD1 Input Supply Current
II Input Current
OUTPUT CHARACTERISTICS
VI = 0V
VI = VDD1
6.5 10.0 mA
0.8 3.0 mA
13.0 mA
-10 +10 µA
IDD2L Logic Low Output Supply Current VI = 0V
5.5 9 mA
IDD2H Logic High Output Supply Current VI = VDD1
5.3 9 mA
VOH Logic High Output Voltage
IO = -20µA, VI = VIH 4.4 5.0
V
VOH
IO = -4mA, VI = VIH
4.0 4.8
V
VOL Logic Low Output Voltage
IO = 20µA, VI = VIL
0 0.1 V
VOL
IO = 4mA, VI = VIL
0.5 1.0
V
Isolation Characteristics (TA = -40°C to +100°C unless otherwise specified.)
Symbol
Characteristics
Test Conditions
Min. Typ.* Max. Unit
VISO
RISO
CISO
Input-Output Isolation Voltage
Isolation Resistance
Isolation Capacitance
f = 60Hz, t = 1.0 min, II-O ≤ 10µA(1)(2)
VI-O = 500V(1)
VI-O = 0 , f = 1.0MHz(1)
3750
1011
0.2
VacRMS
Ω
pF
*All typicals at TA = 25°C
Notes:
1. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted
together.
2. 3,750 VAC RMS for 1 minute duration is equivalent to 4,500 VAC RMS for 1 second duration.
©2004 Fairchild Semiconductor Corporation
FOD0721, FOD0720, FOD0710 Rev. 1.0.7
4
www.fairchildsemi.com
4페이지 Typical Performance Curves (Continued)
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Figure 7. Typical Rise and Fall Time vs. Ambient Temperature
6.00
Frequency = 6.25MHz
Duty Cycle = 50%
V = V = 5.0V
DD1
DD2
5.50
5.00
tr
4.50
tf
4.00
3.50
3.00
-40
-20
0 20 40 60
TA - Ambient Temperature (°C)
80 100
Figure 9. Typical Pulse Width Distortion vs. Output Load Capacitance
(FOD0710)
1.6
Frequency = 6.25MHz
Duty Cycle = 50%
V = V = 5.0V
D D1
DD 2
1.4
1.2
1.0
0.8
0.6
15 20 25 30 35 40 45 50 55
CL - Output Load Capacitance (pF)
Figure 11. Typical Pulse Width Distortion vs. Output Load Capacitance
(FOD0721/FOD0720)
1.4
Frequency = 12.5MHz
Duty Cycle = 50%
V = V = 5.0V
DD 1
DD 2
1.3
1.2
1.1
1.0
0.9
0.8
15 20 25 30 35 40 45 50 55
CL - Output Load Capacitance (pF)
©2004 Fairchild Semiconductor Corporation
FOD0721, FOD0720, FOD0710 Rev. 1.0.7
7
Figure 8. Typical Propogation Delay vs. Output Load Capacitance
(FOD0710)
28
Frequency = 6.25MHz
Duty Cycle = 50%
V = V = 5.0V
27 DD1 DD2
26
25
t
PLH
24
t
PHL
23
22
21
15 20 25 30 35 40 45 50 55
CL - Output Load Capacitance (pF)
Figure 10. Typical Propogation Delay vs. Output Load Capacitance
(FOD0721/FOD0720)
27
Frequency = 12.5MHz
Duty Cycle = 50%
V = V = 5.0V
DD1
D D2
26
25
t
PLH
24
23 t
PHL
22
21
15 20 25 30 35 40 45 50 55
CL - Output Load Capacitance (pF)
Figure 12. Typical Rise and Fall Time vs. Output Load Capacitance
(FOD0710)
12
Frequency = 6.25MHz
Duty Cycle = 50%
V = V = 5.0V
DD1
DD2
10
tf
8
tr
6
4
2
15 20 25 30 35 40 45 50 55
CL - Output Load Capacitance (pF)
www.fairchildsemi.com
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부품번호 | 상세설명 및 기능 | 제조사 |
FOD0710 | (FOD07xx) 25Mbit/sec Logic Gate Optocoupler | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |