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PDF ATXMEGA192A3 Data sheet ( Hoja de datos )
| Número de pieza | ATXMEGA192A3 | |
| Descripción | (ATXMEGAxxxA3) 8/16-bit XMEGA A3 Microcontroller | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Higwhw-pwe.DrfaotarSmhaenect4eU,.Lcoomw-power AVR 8/16-bit XMEGA Microcontroller
• Non-volatile Program and Data Memories
– 64K - 256K Bytes of In-System Self-Programmable Flash
– 4K - 8K Boot Code Section with Independent Lock Bits
– 2K - 4K Bytes EEPROM
– 4K - 16K Bytes Internal SRAM
• Peripheral Features
– Four-channel DMA Controller with support for external requests
– Eight-channel Event System
– Seven 16-bit Timer/Counters
Four Timer/Counters with 4 Output Compare or Input Capture channels
Three Timer/Counters with 2 Output Compare or Input Capture channels
High Resolution Extensions on all Timer/Counters
Advanced Waveform Extension on one Timer/Counter
– Seven USARTs
IrDA Extension on 1 USART
– AES and DES Crypto Engine
– Two Two-wire Interfaces with dual address match(I2C and SMBus compatible)
– Three SPI (Serial Peripheral Interfaces)
– 16-bit Real Time Counter with Separate Oscillator
– Two Eight-channel, 12-bit, 2 Msps Analog to Digital Converters
– One Two-channel, 12-bit, 1 Msps Digital to Analog Converter
– Four Analog Comparators with Window compare function
– External Interrupts on all General Purpose I/O pins
– Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
• Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal and External Clock Options with PLL
– Programmable Multi-level Interrupt Controller
– Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby
– Advanced Programming, Test and Debugging Interfaces
JTAG (IEEE 1149.1 Compliant) Interface for test, debug and programming
PDI (Program and Debug Interface) for programming, test and debugging
• I/O and Packages
– 50 Programmable I/O Lines
– 64-lead TQFP
– 64-pad MLF
• Operating Voltage
– 1.6 – 3.6V
• Speed performance
– 0 – 12 MHz @ 1.6 – 3.6V
– 0 – 32 MHz @ 2.7 – 3.6V
Typical Applications
• Industrial control
• Factory automation
• Building control
• Board control
• White Goods
• Climate control
• ZigBee
• Motor control
• Networking
• Optical
• Hand-held battery applications
• Power tools
• HVAC
• Metering
• Medical Applications
8/16-bit
XMEGA A3
Microcontroller
ATxmega256A3
ATxmega192A3
ATxmega128A3
ATxmega64A3
Preliminary
8068E–AVR–08/08
1 page  
XMEGA A3
4. Resources
www.DataSheet4U.com
A comprehensive set of development tools, application notes and datasheets are available for
download on http://www.atmel.com/avr.
4.1 Recommended reading
5. Disclaimer
• XMEGA A Manual
• XMEGA A Application Notes
This device data sheet only contains part specific information and a short description of each
peripheral and module. The XMEGA A Manual describes the modules and peripherals in depth.
The XMEGA A application notes contain example code and show applied use of the modules
and peripherals.
The XMEGA A Manual and Application Notes are available from http://www.atmel.com/avr.
For devices that are not available yet, typical values contained in this datasheet are based on
simulations and characterization of other AVR XMEGA microcontrollers manufactured on the
same process technology. Min. and Max values will be available after the device is
characterized.
8068E–AVR–08/08
5
5 Page 
XMEGA A3
7.4.1 I/O Memory
www.DataSheet4U.com
All peripherals and modules are addressable through I/O memory locations in the data memory
space. All I/O memory locations can be accessed by the Load (LD/LDS/LDD) and Store
(ST/STS/STD) instructions, transferring data between the 32 general purpose registers in the
CPU and the I/O Memory.
The IN and OUT instructions can address I/O memory locations in the range 0x00 - 0x3F
directly.
I/O registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and
CBI instructions. The value of single bits can be checked by using the SBIS and SBIC instruc-
tions on these registers.
The I/O memory address for all peripherals and modules in XMEGA A3 is shown in the ”Periph-
eral Module Address Map” on page 53.
7.4.2 SRAM Data Memory
7.4.3
The XMEGA A3 devices has internal SRAM memory for data storage.
EEPROM Data Memory
The XMEGA A3 devices has internal EEPROM memory for non-volatile data storage. It is
addressable either in a separate data space or it can be memory mapped into the normal data
memory space. The EEPROM memory supports both byte and page access.
8068E–AVR–08/08
11
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| Páginas | Total 70 Páginas | |
| PDF Descargar | [ Datasheet ATXMEGA192A3.PDF ] | |
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