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PDF ES4428 Data sheet ( Hoja de datos )
| Número de pieza | ES4428 | |
| Descripción | (ES4427 / ES4428) Web/DVD Set-Top Box Solution | |
| Fabricantes | ESS | |
| Logotipo |  |
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ES4428/ES4427
Web/DVD Set-Top Box Solution
Product Brief
DESCRIPTION
The ES4428/ES4427 Web/DVD Internet set-top box chipset
seamlessly combines both Web browser technology and DVD
technology into a highly integrated, low-cost solution for the next
generation of Internet set-top boxes for home use.
The ES4428, which is based on ESS’s Programmable
Multimedia Processor (PMP) device architecture, includes a
programmable internal RISC processor core that makes it
adaptable for use in embedded systems applications such as
set-top boxes. The ES4427 companion chip supplies proper
video sync capabilities and performs NTSC- and PAL-based
video encoding and decoding as necessary to provide broadcast
quality video to the television screen.
The ES4428 DVD processor integrates MPEG-based audio and
video data stream decoding for DVD/VCD/SuperVCD playback,
DVD system navigation and Dolby AC-3 decoding into a single
device. The ES4428 demuxes the incoming DVD audio and
video data streams from the DVD loader using its glueless 8/16-
bit parallel interface, which is hardware-compatible with many
DVD loaders. The ES4428 also supports both 8- and 16-bit
Flash/Read-Only Memory (ROM) and 8- and 16-bit Synchronous
DRAM (SDRAM) memory I/O operations.
The ES4428 controls data I/O transactions to and from the
ES4427 companion chip through its 8-bit Device Serial Connect
(DSC) parallel bus interface. The ES4428 also provides a 16-bit
wide hardware interface with V.90-compatible modem
subsystems incorporated into the set-top box design.
The ES4427 incorporates a multi-standard TV encoder that
supports both the NTSC and PAL formats and CCIR-601 non-
square operations. Two microphone ADCs and PLL clock
synthesizers are incorporated in the ES4427 device architecture.
The ES4427 includes an I/O-mapped auxiliary expansion port
that interfaces with the ES4428. Four pins of the port can be
configured as edge-triggered interrupts, supporting critical
functions, such as handling remote control and modem interrupt
requests, DVD/VCD loader resets and modem board resets.
Command and register accesses are issued through the
DSC interface from the ES4428 DVD processor to the
ES4427 through the device serial communication (DSC)
interface for accessing the internal registers of the
ES4427. The DSC interface port is comprised of three
interface signals, the strobe (DSC_S), data (DSC_D), and
clock (DSC_C).
The DSC port is selected when the DSC strobe goes high
and latches the data at the rising edge of the clock. Each
16-bit DSC transfer is comprised of an address followed
by data.
The ES4428 is available in an industry-standard 208-pin Plastic
Quad Flat Pack (PQFP) package, while the ES4427 is available
in an industry-standard 100-pin PQFP package.
ES4428 FEATURES
• On-chip hardware interface with V.90 data/fax/voice modem
subsystem implemented
• 640 x 480 NTSC and 640 x 576 PAL television video formats
supported
• Configurable for browser/DVD applications
• Hardware support for infrared remote control and/or wireless
keyboard
• On-chip MPEG audio/video decoder and system parser
• On-chip on-screen display (OSD) controller supports 4-bit
blending.
• On-chip subpicture unit (SPU) decoder supports karaoke lyric,
subtitle and closed captioning functions.
• VideoCD 1.1 and 2.0, Interactive 3.0, Super VCD and Audio CD
compatibility available with Video CD / Super VCD player
configuration
• VideoCD 1.1 and 2.0, Interactive 3.0, Super VCD, Audio CD
and MP3 compatibility available with Super VCD / DVD player
configuration
• DTS audio decoding supported
• Programmable multimedia processor architecture
• ISO/IEC 13818-2 MPEG-2 compliant
• ISO/IEC 11172 MPEG-1 compliant
ES4427 FEATURES
• 8-bit DSC parallel bus interface generates edge-triggered
interupts for data read/write interfacing with ES4428
• Dual microphone and vocal assist hardware support provided
• PLL clock synthesizer based on 27 MHz crystal input generates
required clocks for video encoder, video DACs and video
processor
SOFTWARE SUPPORT
• Software stack support for the POP3, SMTP and SNMP Internet
e-mail protocols defined by RFC 821, RFC 1157and RFC 2449
• Software stack support provided for the HTTP Web browsing
protocol defined by RFC 1945, RFC 2068 and RFC 2616
• Software stack support provided for the TCP/IP Internet
protocols defined by RFC 791 and RFC 793
• Software stack support provided for RTP payload format for
MPEG-1/2 and H.261 video streaming protocols defined by
RFC 2032, RFC 2038 and RFC 2250
• Software support for HTML 1.0, 2.0 and 3.2, *.aiff, *.au and
*.wav audio file formats and *.gif, *.jpg and *.xbm graphic file
formats, JavaScript 1.1, SSL 2.0 and SSL 3.0
• Character generation and software support for English,
Big 5/GB Chinese and Japanese fonts
• Software support for infrared remote control and wireless
keyboard
ESS Technology, Inc.
SAM0358-052201
1
1 page  
ES4w4w2w7.DPataINShOeeUt4UT.com
Figure 2 shows the ES4427 device pinout.
ES4428/ES4427 PRODUCT BRIEF
DSC_D7
HSYN_B
DSC_D6
VSYN_B
DSC_D5
YUV7
YUV6
YUV5
YUV4
VCC
VSS
YUV3
DSC_D4
YUV2
DSC_D3
YUV1
DSC_D2
YUV0
DSC_D1
VSS
8180 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 5150
82 49
83 48
84 47
85 46
86 45
87 44
88 43
ES442789 42
90 41
91 40
92
93
100-pin PQFP
39
38
94 37
95 36
96 35
97 34
98 33
99 32
100 31
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
MIC1
MIC2
AOL+
AOL-
AOR-
AOR+
VCCAA
VREFP
VCM
VSSAA
AUX15/IR
AUX14
AUX13
RBCK/SER_IN
AUX12/C2PO
AUX11/IRQ
AUX10
RSD/SEL_PLL0
VCC
VSS
Figure 2 ES4427 Device Pinout
ES4427 PIN DESCRIPTION
Table 2 lists the pin descriptions for the ES4427.
Table 2 ES4427 Pin Descriptions
Name
Number
I/O Definition
VSS
1, 25:26, 31, 72,
75, 77, 91, 100
I Ground.
NC
2:4, 27:30, 76
No connect.
VCC
5, 16, 32, 66, 73, 78, 90 I 5.0V power supply.
DSC_C
6 I Clock for programming to access internal registers.
AUX0
7 I/O General purpose I/O.
DSC_D[7:0]
8, 81, 83, 85,
93, 95, 97, 99
I/O Data for programming to access internal registers.
AUX1
9 I/O General purpose I/O.
DSC_S
10 I Strobe for programming to access internal registers.
AUX2
11 I/O General purpose I/O.
DCLK
12 O MPEG decoder output clock.
EXT_CLK
I EXT_CLK is the external clock EXT_CLK is an input during bypass PLL mode.
RESET#
13 I Reset.
AUX7
14 I/O General purpose I/O.
MUTE
15 O Audio mute.
MCLK
17 I Audio master clock.
5 SAM0358-052201
ESS Technology, Inc.
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