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PDF RMWD24001 Data sheet ( Hoja de datos )

Número de pieza RMWD24001
Descripción 21 - 26.5 GHZ Driver Amplifier Mmic
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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June 2004
RMWD24001
21–26.5 GHz Driver amplifier MMIC
General Description
The RMWD24001 is a 4-stage GaAs MMIC amplifier
designed as a 21 to 26.5 GHz Driver Amplifier for use in
point to point and point to multi-point radios, and various
communications applications. In conjunction with other
Fairchild Semiconductor amplifiers, multipliers and mixers it
forms part of a complete 23 and 26 GHz transmit/receive
chipset. The RMWD24001 utilizes our 0.25µm power
PHEMT process and is sufficiently versatile to serve in a
variety of driver amplifier applications.
Features
• 4 mil substrate
• Small-signal gain 23dB (typ.)
• 1dB compressed Pout 17dBm (typ.)
• Voltage detector included to monitor Pout
• Chip size 2.85mm x 1.2mm
Device
Absolute Ratings
Symbol
Vd
Vg
Vdg
ID
PIN
TC
Tstg
RJC
Parameter
Positive DC Voltage (+4V Typical)
Negative DC Voltage
Simultaneous (Vd–Vg)
Positive DC Current
RF Input Power (from 50source)
Operating Baseplate Temperature
Storage Temperature Range
Thermal Resistance (Channel to Backside)
Ratings
+6
-2
8
345
+8
-30 to +85
-55 to +125
42
Units
V
V
V
mA
dBm
°C
°C
°C/W
©2004 Fairchild Semiconductor Corporation
RMWD24001 Rev. D

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RMWD24001 pdf
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5 MIL THICK
ALUMINA
50
RF INPUT
10,000pF
Vd (POSITIVE)
10,000pF
DIE-ATTACH
80Au/20Sn
100pF
100pF
100pF
100pF
5 MIL THICK
ALUMINA
50
RF OUTPUT
2 MIL GAP
100pF
L < 0.015"
(4 Places)
100pF 3K
Vg (NEGATIVE)
DETECTOR
VOLTAGE
Note:
Use 0.003" by 0.0005" Gold Ribbon for bonding. RF input and output bonds should be less than 0.015" long with stress relief.
Figure 4. Recommended Assembly Diagram
Recommended Procedure for Biasing and Operation
CAUTION: LOSS OF GATE VOLTAGE (VG) WHILE
DRAIN VOLTAGE (VD) IS PRESENT MAY DAMAGE THE
AMPLIFIER CHIP.
The following sequence of steps must be followed to
properly test the amplifier:
Step 1: Turn off RF input power.
Step 2: Connect the DC supply grounds to the grounds of
the chip carrier. Slowly apply negative gate bias supply
voltage of -1.5V to Vg.
Step 3: Slowly apply positive drain bias supply voltage of
+5V to Vd.
Step 4: Adjust gate bias voltage to set the quiescent
current of Idq = 240mA.
Step 5: After the bias condition is established, RF input
signal may now be applied at the appropriate frequency
band.
Step 6: Follow turn-off sequence of:
(i) Turn off RF input power,
(ii) Turn down and off drain voltage (Vd),
(iii) Turn down and off gate bias voltage (Vg).
©2004 Fairchild Semiconductor Corporation
RMWD24001 Rev. D

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