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PDF L6725A Data sheet ( Hoja de datos )
| Número de pieza | L6725A | |
| Descripción | Voltage mode PWM controller | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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L6725
L6725A
Voltage mode PWM controller
with bootstrap anti-discharging system
Features
■ Input voltage range from 1.8V to 18V
■ Supply voltage range from 4.5V to 18V
■ Adjustable output voltage down to 0.6V with
±0.8% accuracy over line voltage and
temperature (0°C~125°C)
■ Fixed frequency voltage mode control
■ 0% to 100% duty cycle
■ External input voltage reference
■ Soft-start and inhibit
■ Bootstrap anti-discharging system
■ High current embedded drivers
■ Predictive anti-cross conduction control
■ Programmable high-side and low-side RDS(on)
sense over-current-protection
■ Sink current capability
■ Selectable switching frequency 250KHz/
500KHz
■ Power good and synch available with L6725A
■ Pre-bias start up capability
■ Over voltage protection
■ Thermal shut-down
■ Package: SO16N
SO16N (Narrow)
Applications
■ Low voltage distributed DC-DC
■ Graphic cards
Table 1.
Device summary
Order codes
L6725
L6725TR
L6725A
L6725ATR
June 2007
Package
SO16N
SO16N
SO16N
SO16N
Rev 5
Packing
Tube
Tape & Reel
Tube
Tape & Reel
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32
1 page  
L6725 - L6725A
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2 Electrical data
Electrical data
2.1 Maximum rating
Table 2. Absolute maximum ratings
Symbol
Parameter
Value
VCC VCC to GND and PGND, OCH
VBOOT - VPHASE Boot voltage
VHGATE - VPHASE
VBOOT
BOOT
PHASE
VPHASE
PHASE Spike, transient < 50ns (FSW = 500KHz)
OCH Pin
OTHER PINS
SS, FB, EAREF, OCL, LGATE, COMP, VCCDR
Maximum withstanding voltage range
Test Condition: CDF-AEC-Q100-002 "Human Body Model"
Acceptance Criteria: "Normal Performance"
-0.3 to 20
0 to 6
0 to VBOOT - VPHASE
-0.3 to 26
-1 to 20
-3
+24
-0.3 to 6
±1500
±2000
Unit
V
\
V
V
V
V
V
2.2 Thermal data
Table 3. Thermal data
Symbol
Description
RthJA(1) Max. thermal resistance junction to ambient
TSTG
Storage temperature range
TJ Junction operating temperature range
TA Ambient operating temperature range
1. Package mounted on demoboard
Value
50
-40 to 150
-40 to 125
-40 to +85
Unit
°C/W
°C
°C
°C
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5 Page 
L6725 - L6725A
Device description
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5.3 Bypassing the LDO to avoid the voltage drop with low Vcc
If VCC≈5V the internal LDO works in dropout with an output resistance of about 1Ω. The
maximum LDO output current is about 100mA and so the output voltage drop is 100mV, to
avoid this the LDO can be bypassed.
Figure 3. Bypassing the LDO
5.4 Internal and external references
It is possible to set the internal/external reference and the switching frequency by setting the
proper voltage at the EAREF pin. The maximum value of the external reference depends on the
VCC: with VCC = 4V the clamp operates at about 2V (typ.), while with VCC greater than 5V the
maximum external reference is 2.5V (typ.).
● VEAREF from 0% to 80% of VCCDR -> External reference/Fsw = 250KHz
● VEAREF from 80% to 95% of VCCDR -> VREF = 0.6V/Fsw = 500KHz
● VEAREF from 95% to 100% of VCCDR -> VREF = 0.6V/Fsw = 250KHz
Providing an external reference from 0V to 450mV the output voltage will be regulated but
some restrictions must be considered:
● The minimum OVP threshold is set at 300mV;
● The under-voltage-protection doesn't work;
To set the resistor divider it must be considered that a 100K pull-down resistor is integrated into
the device (see Figure 4.). Finally it must be taken into account that the voltage at the EAREF
pin is captured by the device at the start-up when VCC is about 4V.
11/32
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet L6725A.PDF ] | |
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