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92CD54IF PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 92CD54IF
기능 TMP92CD54IF
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92CD54IF 데이터시트, 핀배열, 회로
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CMOS 32-bit Micro-controller
TMP92CD54IF
TMP92CD54I
1. Outline and Device Characteristics
TMP92CD54I is high-speed advanced 32-bit micro-controller developed for controlling
equipment which processes mass data.
TMP92CD54I is a micro-controller which has a high-performance CPU (900/H1 CPU) and
various built-in I/Os. TMP92CD54I is housed in a 100-pin mini flat package.
Device characteristics are as follows:
(1) CPU : 32-bit CPU(900/H1 CPU)
Compatible with TLCS-900,900/L,900/L1,900/H,900/H2’s instruction code
16Mbytes of linear address space
General-purpose register and register banks
Micro DMA : 8channels (250ns / 4bytes at fc = 20MHz, best case)
Minimum instruction execution time : 50ns(at 20MHz)
Internal data bus : 32-bit
(2) Internal memory
Internal RAM : 32K-byte
Internal ROM : 512K-byte Mask ROM
92CD54I-1
2006-01-27




92CD54IF pdf, 반도체, 판매, 대치품
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TMP92CD54I
PG0toPG7
(AN0toAN7)
PL0toPL3
(AN8toAN11)
ADVCC
ADVSS
VREFH
VREFL
(TXD0)PF0
(RXD0)PF1
(SCLK0/ CTS0 )PF2
(TXD1)PF3
(RXD1)PF4
(SCLK1/ CTS1 )PF5
(TX)PF6
(RX)PF7
(TI0/INT1)PC0
(TO1)PC1
(TO3/INT2)PC2
(TI4/INT3)PC3
(TO5)PC4
(TO7/INT4)PC5
(TI9(/T(WTI8OU/W8IN/UWTIN1UT/II0NN/ITNT26T//5AA/A111876)))PPPDDD210
(TO9/WUINT3/A19)PD3
(TIA/(WT(TOUIBAIN//WWT4UU/IIINNNTTT567///AAA222102)))PPPDDD456
(TOB/WUINT7/A23)PD7
10-BIT 12CH
A/D
CONVERTER
SERIAL I/O
Channel 0
SERIAL I/O
Channel 1
CAN
CONTROLLER
8BIT TIMER
(TIMER0)
8BIT TIMER
(TIMER1)
8BIT TIMER
(TIMER2)
8BIT TIMER
(TIMER3)
8BIT TIMER
(TIMER4)
8BIT TIMER
(TIMER5)
8BIT TIMER
(TIMER6)
8BIT TIMER
(TIMER7)
16BIT TIMER
(TIMER8)
16BIT TIMER
(TIMERA)
900/H1 CPU
XWA W A
XBC B C
XDE D E
XHL H L
XIX IX
XIY IY
XIZ IZ
XSP SP
32 bits
SR F
PC
WATCH-DOG TIMER
REAL TIME CLOCK (RTC)
32KB RAM
512KB Mask ROM
Regulator
OSC
RTC
INTERRUPT
CONTROLLER
PORT0
PORT4
PORT7
SERIAL
BUS I/F
Channel 0
SERIAL
BUS I/F
Channel 1
SERIAL
BUS I/F
Channel 2
SERIAL
EXP.I/F
Figure 1 TMP92CD54I block diagram
DVSS[6]
DVCC5[5]
DVCC3[3]
REGEN
REGOUT
X1
X2
CLK
XT1
XT2
RESET
AM0
AM1
TEST0
TEST1
NMI
INT0
P00toP07
(D0toD7)
P40toP47
(A0toA7)
P70( RD )
P71( WR )
P73( CS )
P74
P75( WAIT )
PN0(SCK0)
PN1(SO0/SDA0)
PN2(SI0/SCL0)
PN3(SCK1/A12)
PN4(SO1/SDA1/A13)
PN5(SI1/SCL1/A14)
PM4(SCK2)
PN6(SO2/SDA2/A15)
P72(SI2/SCL2)
PM0( SS /A8)
PM1(MOSI/A9)
PM2(MISO/A10)
PM3(SECLK/A11)
92CD54I-4
2006-01-27

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92CD54IF 전자부품, 판매, 대치품
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TMP92CD54I
Pin name
Pin
number
Number
of pins
In/Out
Function
PD4
TIA
INT7
A20
WUINT4
45th
in/out Port D4: I/O port.
in Timer input A: Input pin for timer A
INT7
in Interrupt request pin 7: Interrupt request pin with programmable rising/falling
1 edge.
out Address: Address bus 20.
WUINT4
in Wake up input 4: Wake up request pin with programmable rising, falling or both
falling and rising edge.
PD5
TIB
A21
WUINT5
46th
in/out Port D5: I/O port.
in Timer input B: Input pin for timer B.
WUINT5
1 out Address: Address bus 21.
in Wake up input 5: Wake up request pin with programmable rising, falling or both
falling and rising edge.
PD6
TOA
A22
WUINT6
47th
in/out Port D6: I/O port.
out Timer output A: Output pin for timer A.
WUINT6
1 out Address: Address bus 22.
in Wake up input 6: Wake up request pin with programmable rising, falling or both
falling and rising edge.
PD7
TOB
A23
WUINT7
48th
in/out Port D7: I/O port.
out Timer output B: Output pin for timer B.
WUINT7
1 out Address: Address bus 23.
in Wake up input 7: Wake up request pin with programmable rising, falling or both
falling and rising edge.
PF0
TXD0
12th
1
in/out Port F0: I/O port.
out Serial interface channel 0: Transmission data.
PF1
RXD0
11th
1
in/out Port F1: I/O port.
in Serial interface channel 0: Receive data.
PF2
SCLK0
CTS0
10th
in/out Port F2: I/O port.
1 in/out Serial interface channel 0: Clock input/output.
in Serial interface channel 0: Data ready to send. (Clear-to-send)
PF3
TXD1
9th
1
in/out Port F3: I/O port.
out Serial interface channel 1: Transmission data.
PF4
RXD1
8th
1
in/out Port F4: I/O port.
in Serial interface channel 1: Receive data.
PF5
SCLK1
CTS1
7th
in/out Port F5: I/O port.
1 in/out Serial interface channel 1: Clock input/output.
in Serial interface channel 1: Data ready to send. (Clear-to-send)
PF6
TX
6th
1
in/out Port F6: I/O port.
out CAN: Transmission data.
PF7
RX
5th
1
in/out Port F7: I/O port.
in CAN: Receive data.
PG0..PG7
AN0..AN7
89th…96th
8
in Port G: Input-only port.
in Analog input 0 to 7: AD converter input pins.
PL0..PL3
AN8..AN1 97th...100th
1
4
in Port L0 to L3: Input-only port.
in Analog input 8 to 11: AD converter input pins.
PM0
SS
A8
in/out Port M0: I/O port.
16th 1 in SEI: Slave select input.
out Address: Address bus 8.
PM1
MOSI
A9
17th
in/out Port M1: I/O port.
1 in/out SEI: Master output, slave input.
out Address: Address bus 9.
PM2
MISO
A10
18th
in/out Port M2: I/O port.
1 in/out SEI: Master input, slave output.
out Address: Address bus 10.
PM3
SECLK
A11
19th
in/out Port M3: I/O port.
1 in/out SEI: Clock input/output.
out Address: Address bus 11.
PM4
SCK2
14th
1
in/out Port M4: I/O port.
in/out SBI channel 2: Clock input/output at SIO mode.
PN0
SCK0
59th
1
in/out Port N0: I/O port.
in/out SBI channel 0: Clock input/output at SIO mode.
92CD54I-7
2006-01-27

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92CD54IF

TMP92CD54IF

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Toshiba Semiconductor

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