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PDF CS43L22 Data sheet ( Hoja de datos )

Número de pieza CS43L22
Descripción Stereo DAC w/Headphone & Speaker Amps
Fabricantes Cirrus Logic　
Logotipo Cirrus Logic Logotipo



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No Preview Available ! CS43L22 Hoja de datos, Descripción, Manual

Confidential Draft
3/4/10
CS43L22
Low Power, Stereo DAC w/Headphone & Speaker Amps
FEATURES
98 dB Dynamic Range (A-wtd)
88 dB THD+N
Headphone Amplifier - GND Centered
– No DC-Blocking Capacitors Required
– Integrated Negative Voltage Regulator
– 2 x 23 mW into Stereo 16 Ω @ 1.8 V
– 2 x 44 mW into Stereo 16 Ω @ 2.5V
Stereo Analog Input Passthrough Architecture
– Analog Input Mixing
– Analog Passthrough with Volume Control
Digital Signal Processing Engine
– Bass & Treble Tone Control, De-Emphasis
– PCM Input w/Independent Vol Control
– Master Digital Volume Control and Limiter
– Soft-Ramp & Zero-Cross Transitions
Programmable Peak-Detect and Limiter
Beep Generator w/Full Tone Control
– Tone Selections Across Two Octaves
– Separate Volume Control
– Programmable On and Off Time Intervals
– Continuous, Periodic, One-Shot Beep
Selections
Class D Stereo/Mono Speaker Amplifier
No External Filter Required
High Stereo Output Power at 10% THD+N
– 2 x 1.00 W into 8 Ω @ 5.0 V
– 2 x 550 mW into 8 Ω @ 3.7 V
– 2 x 230 mW into 8 Ω @ 2.5 V
High Mono Output Power at 10% THD+N
– 1 x 1.90 W into 4 Ω @ 5.0 V
– 1 x 1.00 W into 4 Ω @ 3.7 V
– 1 x 350 mW into 4 Ω @ 2.5 V
Direct Battery Powered Operation
– Battery Level Monitoring & Compensation
81% Efficiency at 800 mW
Phase-Aligned PWM Output Reduces Idle
Channel Current
Spread Spectrum Modulation
Low Quiescent Current
+1.65 V to +3.47 V
Interface Supply
Serial
Audio
Input
Reset
I²C
Control
+1.65 V to +2.63 V
Digital Supply
http://www.cirrus.com
+1.60 V to +5.25 V
Battery
Battery Level Monitoring & Compensation
Pulse-Width
Modulator
Digital Volume,
Mono Mix,
Limiter, Bass,
Treble Adjust
Multi-bit
ΔΣ DAC
Class D Amps
+ Stereo/Mono
- Full-Bridge
+
-
Speaker
Outputs
Left HP/Line
Output
Right HP/Line
Output
Beep
Generator
Summing
Σ ΣAmplifiers
1234
Left
Inputs
1234
Right
Inputs
Ground-Centered
Amps
-VHP
+VHP
Charge Pump
Speaker/HP
Switch
+1.65 V to +2.63 V
Headphone Supply
+1.65 V to +2.63 V
Analog Supply
Copyright Cirrus Logic, Inc. 2010
(All Rights Reserved)
MARCH '10
DS792F2

1 page




CS43L22 pdf
Confidential Draft
3/4/10
CS43L22
7.16 Beep Volume & Off Time (Address 1Dh) ..................................................................................... 48
7.16.1 Beep Off Time ..................................................................................................................... 48
7.16.2 Beep Volume ....................................................................................................................... 49
7.17 Beep & Tone Configuration (Address 1Eh) .................................................................................. 49
7.17.1 Beep Configuration .............................................................................................................. 49
7.17.2 Beep Mix Disable ................................................................................................................ 49
7.17.3 Treble Corner Frequency .................................................................................................... 50
7.17.4 Bass Corner Frequency ...................................................................................................... 50
7.17.5 Tone Control Enable ........................................................................................................... 50
7.18 Tone Control (Address 1Fh) ........................................................................................................ 50
7.18.1 Treble Gain .......................................................................................................................... 50
7.18.2 Bass Gain ............................................................................................................................ 51
7.19 Master Volume Control: MSTA (Address 20h) & MSTB (Address 21h) ....................................... 51
7.19.1 Master Volume Control ........................................................................................................ 51
7.20 Headphone Volume Control: HPA (Address 22h) & HPB (Address 23h) .................................... 51
7.20.1 Headphone Volume Control ................................................................................................ 51
7.21 Speaker Volume Control: SPKA (Address 24h) & SPKB (Address 25h) ..................................... 52
7.21.1 Speaker Volume Control ..................................................................................................... 52
7.22 PCM Channel Swap (Address 26h) ............................................................................................. 52
7.22.1 PCM Channel Swap ............................................................................................................ 52
7.23 Limiter Control 1, Min/Max Thresholds (Address 27h) ................................................................. 53
7.23.1 Limiter Maximum Threshold ................................................................................................ 53
7.23.2 Limiter Cushion Threshold .................................................................................................. 53
7.23.3 Limiter Soft Ramp Disable ................................................................................................... 53
7.23.4 Limiter Zero Cross Disable .................................................................................................. 54
7.24 Limiter Control 2, Release Rate (Address 28h) ........................................................................... 54
7.24.1 Peak Detect and Limiter ...................................................................................................... 54
7.24.2 Peak Signal Limit All Channels ........................................................................................... 54
7.24.3 Limiter Release Rate ........................................................................................................... 54
7.25 Limiter Attack Rate (Address 29h) ............................................................................................... 55
7.25.1 Limiter Attack Rate .............................................................................................................. 55
7.26 Status (Address 2Eh) (Read Only) .............................................................................................. 55
7.26.1 Serial Port Clock Error (Read Only) .................................................................................... 55
7.26.2 DSP Engine Overflow (Read Only) ..................................................................................... 55
7.26.3 PCMx Overflow (Read Only) ............................................................................................... 56
7.27 Battery Compensation (Address 2Fh) .......................................................................................... 56
7.27.1 Battery Compensation ......................................................................................................... 56
7.27.2 VP Monitor ........................................................................................................................... 56
7.27.3 VP Reference ...................................................................................................................... 57
7.28 VP Battery Level (Address 30h) (Read Only) .............................................................................. 57
7.28.1 VP Voltage Level (Read Only) ............................................................................................ 57
7.29 Speaker Status (Address 31h) (Read Only) ................................................................................ 57
7.29.1 Speaker Current Load Status (Read Only) ......................................................................... 57
7.29.2 SPKR/HP Pin Status (Read Only) ....................................................................................... 58
7.30 Charge Pump Frequency (Address 34h) ..................................................................................... 58
7.30.1 Charge Pump Frequency .................................................................................................... 58
8. ANALOG PERFORMANCE PLOTS .................................................................................................... 59
8.1 Headphone THD+N versus Output Power Plots ............................................................................ 59
9. EXAMPLE SYSTEM CLOCK FREQUENCIES .................................................................................... 61
9.1 Auto Detect Enabled ................................................................................................................... 61
9.2 Auto Detect Disabled ................................................................................................................... 61
10. PCB LAYOUT CONSIDERATIONS ................................................................................................... 62
10.1 Power Supply, Grounding ............................................................................................................ 62
10.2 QFN Thermal Pad ........................................................................................................................ 62
DS792F2
5

5 Page





CS43L22 arduino
Confidential Draft
3/4/10
CS43L22
ANALOG OUTPUT CHARACTERISTICS
Test conditions (unless otherwise specified): Input test signal is a full-scale 997 Hz sine wave; All Supplies = VA; TA = +25°C;
Sample Frequency = 48 kHz; Measurement bandwidth is 20 Hz to 20 kHz; Test load RL = 10 kΩ, CL = 10 pF for the line output
(see Figure 2); Test load RL = 16 Ω, CL = 10 pF (see Figure 2) for the headphone output; HP_GAIN[2:0] = 011.
VA = 2.5 V
VA = 1.8 V
Parameters (Note 3)
Min Typ Max Min Typ Max Unit
RL = 10 kΩ
Dynamic Range
18 to 24-Bit
16-Bit
A-weighted
unweighted
A-weighted
unweighted
92
89
-
-
98
95
96
93
-
89 95
-
dB
-
86 92
-
dB
- - 93 - dB
- - 90 - dB
Total Harmonic Distortion + Noise
18 to 24-Bit
16-Bit
0 dB
-20 dB
-60 dB
0 dB
-20 dB
-60 dB
-
-
-
-
-
-
-86
-80
-
-88 -82
dB
-75
-
- -72 -
dB
-35
-29
-
-32 -26
dB
-86
-
- -88 -
dB
-73
-
- -70 -
dB
-33
-
- -30 -
dB
RL = 16 Ω
Dynamic Range
18 to 24-Bit
16-Bit
A-weighted
unweighted
A-weighted
unweighted
92
89
-
-
98
95
96
93
-
89 95
-
dB
-
86 92
-
dB
- - 93 - dB
- - 90 - dB
Total Harmonic Distortion + Noise
18 to 24-Bit
16-Bit
0 dB
-20 dB
-60 dB
0 dB
-20 dB
-60 dB
-
-
-
-
-
-
-75
-69
-
-75 -69
dB
-75
-
- -72 -
dB
-35
-29
-
-32 -26
dB
-75
-
- -75 -
dB
-73
-
- -70 -
dB
-33
-
- -30 -
dB
Other Characteristics for RL = 16 Ω or 10 kΩ
Output Parameters
(Note 4)
Modulation Index (MI)
Analog Gain Multiplier (G)
-
-
0.6787
0.6047
-
-
- 0.6787 -
- 0.6047 -
V/V
V/V
Full-scale Output Voltage (2•G•MI•VA) (Note 4)
Refer to Table “Headphone Output Power Characteris-
tics” on page 14
Vpp
Full-scale Output Power (Note 4)
Refer to Table “Headphone Output Power Characteristics” on
page 14
Interchannel Isolation (1 kHz)
16 Ω - 80 - - 80 - dB
10 kΩ - 95 - - 93 - dB
Speaker Amp to HP Amp Isolation
- 80 - - 80 - dB
Interchannel Gain Mismatch
- 0.1 0.25 - 0.1 0.25 dB
Gain Drift
- ±100 -
- ±100 - ppm/°C
AC-Load Resistance (RL)
Load Capacitance (CL)
(Note 5)
(Note 5)
16
-
- - 16 - - Ω
- 150 - - 150 pF
3. One (least-significant bit) LSB of triangular PDF dither is added to data.
4. Full-scale output voltage and power is determined by the gain setting, G, in register “Headphone Analog
Gain” on page 43. High gain settings at certain VA and VHP supply levels may cause clipping when the
audio signal approaches full-scale, maximum power output, as shown in Figures 18 - 21 on page 60.
DS792F2
11

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