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TDA6500 데이터시트 PDF




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부품번호 TDA6500 기능
기능 (TDA6500 / TDA6501) 5V mixer/oscillator and synthesizer
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TDA6500 데이터시트, 핀배열, 회로
www.datasheet4u.com
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC
standards
Rev. 02 — 14 June 2005
Product data sheet
1. General description
TDA6500TT and TDA6501TT are programmable 2-mixer, 3-oscillator and synthesizer
MOPLLs intended for pure 3-band tuner concepts.
The device includes two double balanced mixers for the low and mid/high bands and three
oscillators for the low, mid and high bands, respectively. Other functions are an
IF amplifier, a wide-band AGC detector and a PLL synthesizer. Two pins are available
between the mixer output and the IF amplifier input to enable IF filtering for improved
signal handling.
The device can be controlled according to the I2C-bus format.
2. Features
s Single-chip, 5 V mixer/oscillator and synthesizer for TV and VCR tuners
s I2C-bus protocol compatible with 3.3 V and 5 V microcontrollers:
x Address + 6 data bytes transmission
x Address + 1 status byte (I2C-bus read mode)
x Four independent I2C-bus addresses
s Two PMOS open-drain ports with 5 mA source capability to switch high band and FM
sound trap (P2 and P3)
s One PMOS open-drain port P1 with 20 mA source capability to switch the mid band
s One PMOS open-drain port P0 with 10 mA source capability to switch the low band
s Five step, 3-bit Analog-to-Digital Converter (ADC) and NPN open-collector general
purpose port P6 with 5 mA sinking capability
s NPN open-collector general purpose port P4 with 5 mA sinking capability
s Internal AGC flag
s In-lock flag
s 33 V tuning voltage output
s 15-bit programmable divider
s Programmable reference divider ratio: 64, 80 or 128
s Programmable charge pump current: 60 µA or 280 µA
s Varicap drive disable
s Balanced mixer with a common emitter input for the low band (single input)
s Balanced mixer with a common base input for the mid and high bands (balanced input)
s 2-pin asymmetrical oscillator for the low band
s 2-pin asymmetrical oscillator for the mid band
s 4-pin symmetrical oscillator for the high band




TDA6500 pdf, 반도체, 판매, 대치품
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
6. Pinning information
www.datasheet4u.com
6.1 Pinning
LOSCIN 1
LOSCOUT 2
OSCGND 3
MOSCOUT 4
MOSCIN 5
HOSCIN1 6
HOSCOUT2 7
HOSCOUT1 8
HOSCIN2 9
VCC 10
IFGND 11
IFOUT 12
PLLGND 13
XTAL 14
VT 15
CP 16
TDA6500TT
32 MHBIN2
31 MHBIN1
30 LBIN
29 RFGND
28 IFFIL2
27 IFFIL1
26 P2
25 AGC
24 P1
23 P0
22 P3
21 AS
20 SCL
19 SDA
18 P6/ADC
17 P4
001aac943
Fig 2. Pin configuration for TDA6500TT
MHBIN2 1
MHBIN1 2
LBIN 3
RFGND 4
IFFIL2 5
IFFIL1 6
P2 7
AGC 8
P1 9
P0 10
P3 11
AS 12
SCL 13
SDA 14
P6/ADC 15
P4 16
TDA6501TT
32 LOSCIN
31 LOSCOUT
30 OSCGND
29 MOSCOUT
28 MOSCIN
27 HOSCIN1
26 HOSCOUT2
25 HOSCOUT1
24 HOSCIN2
23 VCC
22 IFGND
21 IFOUT
20 PLLGND
19 XTAL
18 VT
17 CP
001aac944
Fig 3. Pin configuration for TDA6501TT
6.2 Pin description
Table 2: Pin description
Symbol
Pin
Description
TDA6500TT TDA6501TT
AGC
25
8
AGC output
AS 21 12 address selection input
CP 16 17 charge pump output
HOSCIN1 6
27 high band oscillator input 1
HOSCIN2 9
24 high band oscillator input 2
HOSCOUT1 8
25 high band oscillator output 1
HOSCOUT2 7
26 high band oscillator output 2
IFFIL1
27
6
IF filter output 1
IFFIL2
28
5
IF filter output 2
IFGND
11
22
IF ground
IFOUT
12
21
IF output
LBIN
30
3
low band RF input
LOSCIN
1
32 low band oscillator input
LOSCOUT 2
31 low band oscillator output
MHBIN1 31
2
mid and high band RF input 1
MHBIN2 32
1
mid and high band RF input 2
MOSCIN 5
28 mid band oscillator input
9397 750 15057
Product data sheet
Rev. 02 — 14 June 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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TDA6500 전자부품, 판매, 대치품
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
www.datasheet4u.com
9397 750 15057
Product data sheet
pulse, the control register is loaded with data from byte CB after the 8th SCL clock pulse,
the band switch register is loaded with data of byte BB after the 8th SCL clock pulse and
the auxiliary register is loaded with data of byte AB after the 8th SCL clock pulse.
To program the AGC take-over point setting and the AGC current to a different value than
the default value, an additional byte, the auxiliary byte, has to be sent. To this end, the
auxiliary byte is preceded by a control byte with the test bits T2, T1 and T0 set to logic 011
(see Table 8).
Table 5: I2C-bus data format for write mode
Name
Byte Bit
Ack
MSB
LSB
Address byte ADB 1 1 0 0 0 MA1 MA0 R/W = 0 A
Divider byte 1 DB1 0
N14 N13 N12 N11 N10 N9 N8
A
Divider byte 2 DB2 N7 N6 N5 N4 N3 N2 N1 N0
A
Control byte
CB 1
CP T2 T1 T0 RSA RSB OS
A
Band switch byte BB 0
P6 0
P4 P3 P2 P1 P0
A
Auxiliary byte [1] AB
ATC AL2 AL1 AL0 0
0
0
0
A
[1] Auxiliary byte AB replaces band switch byte BB when bit T2 = 0, T1 = 1 and T0 = 1.
Table 6: Description of bits shown in Table 5
Symbol
Description
A acknowledge
MA1 and MA0
programmable address bits; see Table 7
R/W logic 0 for write mode
N14 to N0
programmable divider bits;
N = (N14 × 214) + (N13 × 213) + ... + (N1 × 21) + N0
CP charge pump current
CP = 0: the charge pump current is 60 µA
CP = 1: the charge pump current is 280 µA (default)
T2, T1 and T0
test bits; see Table 8
RSA and RSB
reference divider ratio select bits; see Table 9
OS tuning amplifier control bit
OS = 0: normal operation; tuning voltage is on
OS = 1: tuning voltage is off; high-impedance state (default)
P6 and P4
NPN port control bits
Pn = 0: port n is off; high-impedance state (default)
P3 to P0
Pn = 1: buffer n is on; VO = VCE(sat)
PMOS port control bits
Pn = 0: port n is off; high-impedance state (default)
ATC
Pn = 1: buffer n is on; VO = VCC VDS(sat)
AGC time constant
AL2, AL1 and AL0
ATC = 0: IAGC = 220 nA; t = 2 s with C = 160 nF (default)
ATC = 1: IAGC = 9 µA; t = 50 ms with C = 160 nF
AGC take-over point bits; see Table 10
Rev. 02 — 14 June 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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(TDA6500 / TDA6501) 5V mixer/oscillator and synthesizer

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5 V mixer/oscillator and synthesizer for PAL and NTSC standards

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