PDF TJA1081 Data sheet ( Hoja de datos )

Número de pieza	TJA1081
Descripción	FlexRay Node Transceiver
Fabricantes	NXP Semiconductors
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No Preview Available ! TJA1081 FlexRay node transceiver Rev. 01 — 15 April 2009 Preliminary data sheet www.datasheet4u.com 1. General description The TJA1081 is a FlexRay node transceiver that is fully compliant with the FlexRay electrical physical layer speciﬁcation V2.1 Rev. A (see Ref. 1) and partly complies with versions V2.1 Rev. B. In addition, the TJA1081 already incorporates features and parameters anticipated to be included in V3.0, currently being ﬁnalized. It is primarily intended for communication systems from 1 Mbit/s to 10 Mbit/s, and provides an advanced interface between the protocol controller and the physical bus in a FlexRay network. The TJA1081 features enhanced low-power modes, optimized for ECUs that are permanently connected to the battery. The TJA1081 provides differential transmit capability to the network and differential receive capability to the FlexRay controller. It offers excellent EMC performance as well as high ESD protection. The TJA1081 actively monitors system performance using dedicated error and status information (that can be read by any microcontroller), along with internal voltage and temperature monitoring. The TJA1081 supports mode control as used in the TJA1080A (see Ref. 2). 2. Features 2.1 Optimized for time triggered communication systems I Compliant with FlexRay electrical physical layer speciﬁcation V2.1 Rev. A (see Ref. 1) I Automotive product qualiﬁcation in accordance with AEC-Q100 I Data transfer up to 10 Mbit/s I Support of 60 ns minimum bit time I Very low ElectroMagnetic Emission (EME) to support unshielded cable I Differential receiver with wide common-mode range for high ElectroMagnetic Immunity (EMI) I Auto I/O level adaptation to host controller supply voltage VIO I Can be used in 14 V and 42 V powered systems I Bus guardian interface I Independent power supply ramp-up for VBAT, VCC and VIO 2.2 Low power management I Low power management including inhibit switch I Very low current in Sleep and Standby modes 1 page NXP Semiconductors TJA1081 FlexRay node transceiver 6. Functional description www.datasheet4u.com The block diagram of the transceiver is shown in Figure 1. 6.1 Operating modes The TJA1081 supports the following operating modes: • Normal (normal-power mode) • Receive-only (normal-power mode) • Standby (low-power mode) • Go-to-sleep (low-power mode) • Sleep (low-power mode) 6.1.1 Bus activity and idle detection The following mechanisms for activity and idle detection are valid in normal-power modes: • If the absolute differential voltage on the bus lines is higher than \|Vi(dif)det(act)\| for tdet(act)(bus), activity is detected on the bus lines and pin RXEN is switched LOW which results in pin RXD being released: – If, after bus activity detection, the differential voltage on the bus lines is higher than VIH(dif), pin RXD will go HIGH – If, after bus activity detection, the differential voltage on the bus lines is lower than VIL(dif), pin RXD will go LOW • If the absolute differential voltage on the bus lines is lower than \|Vi(dif)det(act)\| for tdet(idle)(bus), then idle is detected on the bus lines and pin RXEN is switched to HIGH. This results in pin RXD being blocked (pin RXD is switched to HIGH or stays HIGH) 6.2 Mode control pins: STBN and EN Control inputs STBN and EN are used to select the operating mode. See Table 3 for a detailed description of pin signalling and Figure 3 for the timing diagram. All mode transitions are controlled via the STBN and EN pins, unless an undervoltage condition is detected. If VIO and (VCC or VBAT) are within their speciﬁed operating ranges, pin ERRN will indicate the status of the error ﬂag. Table 3. Pin signalling Mode STBN EN ERRN[1] RXEN RXD Transmitter INH LOW HIGH LOW HIGH LOW HIGH Normal HIGH HIGH error ﬂag error ﬂag bus Receive-only HIGH LOW set reset activity bus bus DATA_0 bus DATA_1 enabled idle or idle disabled HIGH Go-to-sleep Standby Sleep LOW LOW LOW HIGH error ﬂag LOW set[2] X error ﬂag reset wake ﬂag set[2] wake ﬂag reset wake ﬂag set[2] wake ﬂag reset ﬂoat [1] Pin ERRN provides a serial interface for retrieving diagnostic information. [2] Valid if VIO and (VCC or VBAT) are present. TJA1081_1 Preliminary data sheet Rev. 01 — 15 April 2009 © NXP B.V. 2009. All rights reserved. 5 of 36 5 Page xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx Table 7. State transitions forced by an undervoltage recovery → indicates the action that initiates a transaction; →1 and →2 are the consequences of a transaction. Transition from mode Standby Direction to Transition mode number Normal 38 Pin STBN H EN H Flag UVVIO cleared UVVBAT cleared UVVCC → cleared PWON X Wake X Note [1] Receive-only 39 H L cleared cleared → cleared X X [1] Sleep Normal 40 H H cleared → cleared cleared X 1 → cleared [2][3] Normal 41 H H → cleared cleared cleared X X [4] Receive-only 42 H L cleared → cleared cleared X 1 → set [2][3] Receive-only 43 H L → cleared cleared cleared X X [4] Standby 44 L L cleared → cleared cleared X 1 → set [2][3] Sleep 45 L X → cleared cleared cleared X cleared [4] Go-to-sleep 46 L H cleared → cleared cleared X 1 → set [2][3] Sleep 47 L X → cleared cleared cleared X cleared [4] [1] Recovery of UVVCC ﬂag. [2] Recovery of UVVBAT ﬂag. [3] Clearing the UVVBAT ﬂag sets the wake ﬂag. In the case of a transition to Normal mode the wake ﬂag is immediately cleared. [4] Recovery of UVVIO ﬂag. 11 Page

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