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PDF LM4935 Data sheet ( Hoja de datos )
| Número de pieza | LM4935 | |
| Descripción | Audio Sub-System | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LM4935 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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October 2005
LM4935
Audio Sub-System with Dual-Mode Stereo Headphone &
Monowww.datasheet4u.com High Efficiency Loudspeaker Amplifiers and
Multi-Purpose ADC
1.0 General Description
The LM4935 is an integrated audio subsystem that supports
both analog and digital audio functions. The LM4935 in-
cludes a high quality stereo DAC, a mono ADC, a multi-
purpose SAR ADC, a stereo headphone amplifier, which
supports output cap-less (OCL) or AC-coupled (SE)modes of
operation, a mono earpiece amplifier and a mono high effi-
ciency loudspeaker amplifier. It is designed for demanding
applications in mobile phones and other portable devices.
The LM4935 features a bi-directional I2S serial interface for
full range audio and an I2C or SPI compatible interface for
control. The stereo DAC path features an SNR of 88 dB with
an 18-bit 48 kHz input. In SE mode the headphone amplifier
delivers at least 33 mWRMS to a 32Ω single-ended stereo
load with less than 1% distortion (THD+N) when A_VDD =
3.3V. The mono earpiece amplifier delivers at least 115
mWRMS to a 32Ω bridged-tied load with less than 1% distor-
tion (THD+N) when A_VDD = 3.3V. The mono speaker am-
plifier delivers up to 600 mW into an 8Ω load with less than
1% distortion when LS_VDD = 3.3V and up to 1.3W when
LS_VDD = 5.0V. The LM4935 also contains a general pur-
pose SAR ADC for housekeeping duties such as battery and
temperature monitoring. This can also be used for analog
volume control of the output stages and can trigger interrupt
events.
The LM4935 employs advanced techniques to reduce power
consumption, to reduce controller overhead to speed devel-
opment time and to eliminate click and pop. Boomer audio
power amplifiers were designed specifically to provide high
quality output power with a minimal amount of external com-
ponents. It is therefore ideally suited for mobile phone and
other low voltage applications where minimal power con-
sumption, PCB area and cost are primary requirements.
2.0 Applications
n Smartphones
n Mobile Phones and Multimedia Terminals
n PDAs, Internet Appliances and Portable Gaming
n Portable DVD/CD/AAC/MP3 Players
n Digital Cameras/Camcorders
3.0 Key Specifications
n PHP (AC-COUP) @ A_VDD = 3.3V, 32Ω, 1% THD
n PHP (OCL) @ A_VDD = 3.3V, 32Ω, 1% THD
n PLS @ LS_VDD = 5V, 8Ω, 1% THD
n PLS @ LS_VDD = 4.2V, 8Ω, 1% THD
n PLS @ LS_VDD = 3.3V, 8Ω, 1% THD
33 mW
31 mW
1.3 W
900 mW
600 mW
j Supply Voltage Range
BB_VDD = 1.8V to 4.5V,
D_VDD & PLL_VDD = 2.7V to 4.5V
LS_VDD & A_VDD = 2.7V to 5.5V
n Shutdown Current
1.1 µA
n PSRR @ 217 Hz, A_VDD = 3.3V, (Headphone) 60 dB
n SNR (Stereo DAC to AUXOUT)
88 dB (typ)
n SNR (Mono ADC from Cell Phone In)
90 dB (typ)
n SNR (Aux In to Headphones)
98 dB (typ)
4.0 Features
n 18-bit stereo DAC
n 16-bit mono ADC
n 12-bit 4 input multipurpose SAR ADC
n 8 kHz to 48 kHz stereo audio playback
n 8 kHz to 48 kHz mono recording
n 1 Hz to 13.888 kHz sample rate on all 4 SAR channels
n Bidirectional PCM/I2S compatible audio interface
n Sigma-Delta PLL for operation from any clock at any
sample rate
n Low power clock network operation if 12 MHz system
clock is available
n Read/write I2C or SPI compatible control interface
n 33mW stereo headphone amplifier at 3.3V
n OCL or AC-coupled headphone operation
n Automatic headphone & microphone detection
n Support for internal and external microphones
n Automatic gain control for microphone input
n High efficiency BTL 8Ω amplifier, 600 mW @ 3.3V
n 115 mW earpiece amplifier at 3.3V
n Differential audio I/O for external cellphone module
n Mono differential auxiliary output
n Stereo auxiliary inputs
n Differential microphone input for internal microphone
n Flexible audio routing from input to output
n 32 Step volume control for mixers with 1.5 dB steps
n 16 Step volume control for microphone in 2 dB steps
n Programmable sidetone attenuation in 3 dB steps
n DC Volume Control
n Two configurable GPIO ports
n Programmable voltage triggers on SAR channels
n Multi-function IRQ output
n Micro-power shutdown mode
n Available in the 4 x 4 mm 49 bump microfil package
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2005 National Semiconductor Corporation DS201341
www.national.com
1 page  
Table of Contents (Continued)
14.0 LM4935 Demonstration Board Schematic Diagram .............................................................................. 104
15.0 Demoboard PCB Layout ........................................................................................................................ 105
16.0 Product Status Definitions ...................................................................................................................... 110
17.0 Revision History ...................................................................................................................................... 111
18.0 Physical Dimensions .............................................................................................................................. 112
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5 Page 
10.0 Electrical Characteristics (Notes 1, 2) Unless otherwise stated PLL_VDD = 3.3V, D_VDD = 3.3V,
BB_VDD = 1.8V, A_VDD = 3.3V, LS_VDD = 3.3V. The following specifications apply for the circuit shown in Figure 2 unless
otherwise stated. Limits apply for 25˚C. (Continued)
Symbol
Parameter
STEREO DAC
wwwR.dDaAtaCsheet4u.comDAC Ripple
PBDAC
DAC Passband
SBADAC
DAC Stopband Attenuation
SNRDAC
DAC Signal to Noise Ratio
DRDAC
DAC Dynamic Range
DACLEVEL
DAC Full Scale Output Level
PLL
FIN Input Frequency Range
I2S/PCM
fI2SCLK
I2S CLK Frequency
fPCMCLK
PCM CLK Frequency
DCI2S_CLK
I2S_CLK Duty Cycle
DCI2S_WS
I2C
I2S_WS Duty Cycle
TI2CSET
TI2CHOLD
SPI
I2C Data Setup Time
I2C Data Hold Time
TSPISETENB
Enable Setup Time
TSPIHOLD-ENB Enable Hold Time
TSPISETD
Data Setup Time
TSPIHOLDD
Data Hold Time
TSPICL
Clock Low Time
TSPICH
Clock High Time
VOLUME CONTROL
VCRAUX
AUX Volume Control Range
VCRDAC
DAC Volume Control Range
VCRCPIN
CPIN Volume Control Range
Conditions
LM4935
Typical
Limit
(Note 6) (Note 7)
Units
A-weighted, AUXOUT
Min
Max
0.1 dB
20 kHz
70 dB
88 dB
96 dB
1 VRMS
0.5 MHz
30 MHz
fS = 48kHz; 16 bit mode
fS = 48kHz; 25 bit mode
fS = 8kHz; 16 bit mode
fS = 8kHz; 25 bit mode
fS = 48kHz; 16 bit mode
fS = 48kHz; 25 bit mode
fS = 8kHz; 16 bit mode
fS = 8kHz; 25 bit mode
Min
Max
1.536
2.4
0.256
0.4
0.768
1.2
0.128
0.2
50
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
40 % (min)
%
60
(max)
%
Refer to Pg. 18 for more details
Refer to Pg. 18 for more details
100 ns (min)
300 ns (min)
100 ns (min)
100 ns (min)
100 ns (min)
100 ns (min)
500 ns (min)
500 ns (min)
Minimum Gain w/ AUX_BOOST OFF
Maximum Gain w/ AUX_BOOST
OFF
Minimum Gain w/ AUX_BOOST ON
Maximum Gain w/ AUX_BOOST ON
Minimum Gain w/ DAC_BOOST OFF
Maximum Gain w/ DAC_BOOST
OFF
Minimum Gain w/ DAC_BOOST ON
Maximum Gain w/ DAC_BOOST ON
Minimum Gain
Maximum Gain
–46.5
0
–34.5
12
–46.5
0
–34.5
12
–34.5
12
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LM4935.PDF ] | |
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