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PDF PIP202-12M Data sheet ( Hoja de datos )
| Número de pieza | PIP202-12M | |
| Descripción | DC to DC converter powertrain | |
| Fabricantes | NXP Semiconductors | |
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M3D797
PIP202-12M
DC to DC converter powertrain
Rev. 01 — 15 July 2002
Product data
1. Description
The PIP202-12M is designed for use as the power output stage of a synchronous
buck DC to DC converter. It contains a MOSFET control IC, two power MOSFET
transistors and a Schottky diode. By combining the power MOSFETs and the driver
circuit into a single component, stray inductances are virtually eliminated, resulting in
higher switching frequency, lower switching losses and a compact, efficient design.
2. Features
s Input voltage conversion range from 3.3 V to 12 V
s Output voltages from 0.8 V to 5 V
s Capable of up to 25 A continuous output current
s Operating frequency up to 1 MHz
s Peak system efficiency >92% at 500 kHz
s High efficiency
s Low-profile, surface mount package (10 × 10 × 0.85 mm)
s Compatible with any single or multi-phase PWM controller.
3. Applications
s High-current DC to DC point-of-load converters
s Small form-factor Voltage Regulator Modules
s Microprocessor and memory voltage regulators.
4. Ordering information
Table 1: Ordering information
Type number
Package
Name
PIP202-12M
HVQFN68
(MLF68)
Description
Version
plastic, thermal enhanced very thin quad flat package; no leads; SOT687-1
68 terminals; body 10 × 10 × 0.85 mm
1 page  
Philips Semiconductors
www.DataSheet4U.com
PIP202-12M
DC to DC converter powertrain
7.4 3-state function
If the input from the PWM controller becomes high impedance (3-state) for longer
than144 ns, then both MOSFETs are turned off and the VI input is driven to 2.5 V by
an internal 2 x 10 kΩ resistor voltage divider between an internal 5 V reference and
ground.
8. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VDDC
VDDO
VI
VO
VCB
IO(AV)
IORM
Ptot
Tstg
Tj
control circuit supply voltage
output stage supply voltage
input voltage
output voltage
bootstrap voltage
average output current
repetitive peak output current
total power dissipation
storage temperature
junction temperature
VDDC = 12 V; Tpcb ≤ 110 °C; Figure 5
VDDC = 12 V; tp ≤ 10 µs
[1]
Tpcb = 25 °C
[2]
Tpcb = 90 °C
[2]
Min
−0.5
−0.5
−0.5
−0.5
−0.5
-
-
-
-
−55
−55
[1] Pulse width and repetition rate limited by maximum value of Tj.
[2] Assumes a thermal resistance from junction to printed-circuit board of 5 K/W.
Max Unit
14 V
25 V
5.25 V
VDDO + 0.5 V
VO + 14 V
25 A
200 A
25 W
12 W
+150
°C
+150
°C
30
IO(AV)
(A)
20
03ag41
10
0
0 50 100 150
Tpcb (°C)
VDDC = 12 V; VDDO = 12 V; fi = 500 kHz; VO = 1.6 V.
Fig 5. Average output current as a function of printed-circuit board temperature.
9397 750 10031
Product data
Rev. 01 — 15 July 2002
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
5 of 20
5 Page 
Philips Semiconductors
www.DataSheet4U.com
PIP202-12M
DC to DC converter powertrain
9397 750 10031
Product data
output stage supply voltage
10 Ω
1 µF
control circuit
supply (12 V)
100
nF
VDDC CB VDDO
input voltage
from PWM controller
VO
VI
VSSC VSSO
Lout
Cin
output
Cout
signal ground
power ground
03ae27
Fig 12. External connection of power and signal lines.
To protect the control circuit from the transient voltages, the following precautions
must be taken. Refer to Figure 12.
1. The output stage ground (VSSO) must be connected to the decoupling capacitor
(Cin) before joining the ground plane. Otherwise, the switching noise on VSSO will
couple into the control circuit ground (VSSC).
2. The control circuit supply must be filtered using a resistor-capacitor (RC) filter.
The values shown in Figure 12 are suitable for most applications.
3. It is essential that the VSSC (signal ground) connection at the device is not
connected in the current return path between the VSSO (power ground)
connection at the device and the VDDO input capacitor.
4. It is also essential that the input to the VDDC (logic power) filter is not connected in
the current path between the VDDO (conversion power) connection at the device.
11.4 Switching frequency
A high operating frequency reduces the size and number of capacitors needed to
filter the output current, and also reduces the size of the output inductors. The
disadvantage, however is higher dissipation due to switching and MOSFET driver
losses. For example, doubling the operating frequency of the circuit in Figure 11 from
500 kHz to 1 MHz would increase the power dissipation in each PIP202-12M from
4 W to 6 W, at an output current of 20 A in each PIP202-12M.
The maximum switching frequency is limited by thermal considerations, the
dissipation in the PIP202-12M device(s) and the thermal resistance from junction to
ambient.
11.5 Thermal design
The PIP202-12M has three pads on its underside. These are designated PAD1, PAD2
and PAD3 (Figure 2). PAD1 is connected to VDDO, PAD2 is connected to VSSC and
PAD3 is connected to VO. In addition to providing low inductance electrical
connections, these pads conduct heat away efficiently from the MOSFETs and
control IC to the printed-circuit board. The thermal resistance from junction to
printed-circuit board is approximately 5 K/W. In order to take full advantage of the low
Rev. 01 — 15 July 2002
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
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