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PDF FXL2SD106 Data sheet ( Hoja de datos )
| Número de pieza | FXL2SD106 | |
| Descripción | Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de FXL2SD106 (archivo pdf) en la parte inferior de esta página. Total 14 Páginas | ||
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www.DataSheet4U.com
June 2008
FXL2SD106
Low Voltage Dual Supply 6-Bit SD Interface Voltage
Translator with Configurable Voltage Supplies and Signal
Levels, 3-State Outputs, and Auto Direction Sensing
Features
■ Bi-directional interface between two levels from 1.1V
to 3.6V
■ Fully configurable: Inputs and outputs track VCC level
■ Non-preferential power-up; either VCC may be
powered-up first
■ Outputs remain in 3-state until active VCC level is
reached
■ Outputs switch to 3-state if either VCC is at GND.
■ Power off protection
■ Bushold on data inputs eliminates the need for SDIO
pull-up resistors
■ Control input (OE and CLK IN) are referenced to VCCA
voltage
■ Packaged in 16-terminal DQFN (2.5mm x 3.5mm)
■ Direction control not needed
■ 80 Mbps throughput when translating between 1.8V
and 2.5V
■ ESD protection exceeds:
– 12kV HBM (B port I/O to GND)
(per JESD22-A114 & Mil Std 883e 3015.7)
– 8kV HBM (A port I/O to GND)
(per JESD22-A114 & Mil Std 883e 3015.7)
– 1kV CDM (per ESD STM 5.3)
General Description
The FXL2SD106 is a configurable dual-voltage-supply
translator designed for both uni-directional and bi-
directional voltage translation between two logic levels.
The device allows translation between voltages as high
as 3.6V to as low as 1.1V. The A port tracks the VCCA
level, and the B port tracks the VCCB level. This allows
for bi-directional voltage translation over a variety of volt-
age levels: 1.2V, 1.5V, 1.8V, 2.5V and 3.3V.
The FXL2SD106 is specifically designed as a translator
to interface with the SDIO standard. I/O capacitance is
managed to meet the SD maximum capacitance specifi-
cation. The B side ESD performance allows interface as
an external card and the part can handle 80 Mbps
throughput when translating between 1.8V and 2.5V.
The device remains in 3-state until both VCCs reach
active levels allowing either VCC to be powered-up first.
Internal power down control circuits place the device in
3-state if either VCC is removed.
The OE input, when low, disables both the A and B ports
by placing them in a 3-state condition. The FXL2SD106
is designed so that both control pins (OE and CLK IN)
are supplied by VCCA.
The device senses an input signal on A or B port
automatically. The input signal is transferred to the other
port.
Ordering Information
Order Number
Package Number
FXL2SD106BQX
MLP16E
Package Description
16-Terminal Depopulated Quad Very-Thin Flat Pack,
No Leads (DQFN), JEDEC MO-241, 2.5mm x 3.5mm
All packages are lead free per JEDEC: J-STD-020B standard.
©2008 Fairchild Semiconductor Corporation
FXL2SD106 Rev. 1.8.0
www.fairchildsemi.com
1 page  
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DC Electrical Characteristics (TA = –40°C to +85°C) (Continued)
Symbol
ICCA(7)
ICCB(7)
Parameter
Quiescent
Supply Current
Quiescent
Supply Current
VCCA (V)
0
1.1–3.6
1.1–3.6
0
VCCB (V)
1.1–3.6
0
0
1.1–3.6
Conditions
VI = VCCB or GND; IO = 0
VI = VCCA or GND; IO = 0
VI = VCCB or GND; IO = 0
VI = VCCA or GND; IO = 0
Min.
Typ.
Max.
-2.0
2.0
-2.0
2.0
Units
µA
µA
Notes:
3. This is the output voltage for static conditions. Dynamic drive specifications are given in “Dynamic Output Electrical
Characteristics.”
4. An external driver must source at least the specified current to switch LOW-to-HIGH.
5. An external driver must source at least the specified current to switch HIGH-to-LOW.
6. “Don’t Care” indicates any valid logic level.
7. VCCI is the VCC associated with the input side.
8. Reflects current per supply, VCCA or VCCB.
Dynamic Output Electrical Characteristics(9)
A Port (An, CMD A)
Output Load: CL = 15pF, RL ≥ 1MΩ (CI/O = 5pF)
TA = -40°C to +85°C, VCCA =
3.0V to 3.6V 2.3V to 2.7V 1.65V to 1.95V 1.4V to 1.6V
Symbol
trise(10)
tfall(11)
IOHD(10)
IOLD(11)
Parameter Typ.
Output Rise
Time A port
Output Fall Time
A port
Dynamic Output -18.0
Current High
Dynamic Output +18.0
Current Low
Max.
3.0
3.0
Typ.
-11.8
+11.8
Max.
3.5
3.5
Typ.
-7.4
+7.4
Max. Typ. Max.
4.0 5.0
4.0 5.0
-5.0
+5.0
1.1V to 1.3V
Typ.
7.5
7.5
-2.6
+2.6
Units
ns
ns
mA
mA
B Port (Bn, CMD B, CLK OUT)
Output Load: CL = 15pF, RL ≥ 1MΩ (CI/O = 15pF)
TA = -40°C to +85°C, VCCB =
3.0V to 3.6V 2.3V to 2.7V 1.65V to 1.95V 1.4V to 1.6V
Symbol
trise(10)
tfall(11)
IOHD(10)
IOLD(11)
Parameter Typ.
Output Rise
Time A port
Output Fall Time
A port
Dynamic Output -18.0
Current High
Dynamic Output +18.0
Current Low
Max.
3.0
3.0
Typ.
-11.8
+11.8
Max.
3.5
3.5
Typ.
-7.4
+7.4
Max. Typ. Max.
4.0 5.0
4.0 5.0
-5.0
+5.0
1.1V to 1.3V
Typ.
7.5
7.5
-2.6
+2.6
Units
ns
ns
mA
mA
Notes:
9. Dynamic Output Characteristics are guaranteed but not tested.
10. See Figure 5.
11. See Figure 6.
©2008 Fairchild Semiconductor Corporation
FXL2SD106 Rev. 1.8.0
5
www.fairchildsemi.com
5 Page 
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Tape and Reel Specification
Tape Format for DQFN 10
Package
Designator
BQX
Tape
Section
Leader (Start End)
Carrier
Trailer (Hub End)
Tape Dimensions millimeters
Number
Cavities
125 (typ)
2500/3000
75 (typ)
Cavity
Status
Empty
Filled
Empty
Cover Tape
Status
Sealed
Sealed
Sealed
©2008 Fairchild Semiconductor Corporation
FXL2SD106 Rev. 1.8.0
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet FXL2SD106.PDF ] | |
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