PDF AT32UC3A3128 Data sheet ( Hoja de datos )

Número de pieza	AT32UC3A3128
Descripción	32-bit AVR Microcontroller
Fabricantes	ATMEL Corporation
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Features • High Performance, Low Power 32-bit Atmel® AVR® Microcontroller – Compact Single-Cycle RISC Instruction Set Including DSP Instruction Set – Read-Modify-Write Instructions and Atomic Bit Manipulation – Performing up to 1.51DMIPS/MHz • Up to 126 DMIPS Running at 84MHz from Flash (1 Wait-State) • Up to 63 DMIPS Running at 42MHz from Flash (0 Wait-State) – Memory Protection Unit • Multi-Layer Bus System – High-Performance Data Transfers on Separate Buses for Increased Performance – 8 Peripheral DMA Channels (PDCA) Improves Speed for Peripheral Communication – 4 generic DMA Channels for High Bandwidth Data Paths • Internal High-Speed Flash – 256KBytes, 128KBytes, 64KBytes versions – Single-Cycle Flash Access up to 36MHz – Prefetch Buffer Optimizing Instruction Execution at Maximum Speed – 4 ms Page Programming Time and 8ms Full-Chip Erase Time – 100,000 Write Cycles, 15-year Data Retention Capability – Flash Security Locks and User Defined Configuration Area • Internal High-Speed SRAM – 64KBytes Single-Cycle Access at Full Speed, Connected to CPU Local Bus – 64KBytes (2x32KBytes with independent access) on the Multi-Layer Bus System • Interrupt Controller – Autovectored Low Latency Interrupt Service with Programmable Priority • System Functions – Power and Clock Manager Including Internal RC Clock and One 32KHz Oscillator – Two Multipurpose Oscillators and Two Phase-Lock-Loop (PLL), – Watchdog Timer, Real-Time Clock Timer • External Memories – Support SDRAM, SRAM, NandFlash (1-bit and 4-bit ECC), Compact Flash – Up to 66 MHz • External Storage device support – MultiMediaCard (MMC V4.3), Secure-Digital (SD V2.0), SDIO V1.1 – CE-ATA V1.1, FastSD, SmartMedia, Compact Flash – Memory Stick: Standard Format V1.40, PRO Format V1.00, Micro – IDE Interface • One Advanced Encryption System (AES) for AT32UC3A3256S, AT32UC3A3128S, AT32UC3A364S, AT32UC3A4256S, AT32UC3A4128S and AT32UC3A364S – 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB 197 Specifications – Buffer Encryption/Decryption Capabilities • Universal Serial Bus (USB) – High-Speed USB 2.0 (480Mbit/s) Device and Embedded Host – Flexible End-Point Configuration and Management with Dedicated DMA Channels – On-Chip Transceivers Including Pull-Ups • One 8-channel 10-bit Analog-To-Digital Converter, multiplexed with Digital IOs. • Two Three-Channel 16-bit Timer/Counter (TC) • Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART) – Fractionnal Baudrate Generator 32-bit AVR Microcontroller AT32UC3A3256S AT32UC3A3256 AT32UC3A3128S AT32UC3A3128 AT32UC3A364S AT32UC3A364 AT32UC3A4256S AT32UC3A4256 AT32UC3A4128S AT32UC3A4128 AT32UC3A464S AT32UC3A464 32072H-AVR32–10/2012 1 page AT32UC3A3 2.2 Configuration Summary The table below lists all AT32UC3A3/A4 memory and package configurations: Table 2-1. Configuration Summary Feature Flash SRAM HSB RAM EBI GPIO External Interrupts TWI USART Peripheral DMA Channels Generic DMA Channels SPI MCI slots High Speed USB AES (S option) SSC Audio Bitstream DAC Timer/Counter Channels Watchdog Timer Real-Time Clock Timer Power Manager Oscillators 10-bit ADC number of channels JTAG Max Frequency Package AT32UC3A3256/128/64 AT32UC3A4256/128/64 256/128/64 KB 64 KB 64 KB Full Nand flash only 110 70 8 2 4 8 4 2 2 MMC/SD slots 1 MMC/SD slot + 1 SD slot 1 1 1 1 6 1 1 1 PLL 80-240 MHz (PLL0/PLL1) Crystal Oscillators 0.4-20 MHz (OSC0/OSC1) Crystal Oscillator 32 KHz (OSC32K) RC Oscillator 115 kHz (RCSYS) 1 8 1 84 MHz LQFP144, TFBGA144 VFBGA100 32072H–AVR32–10/2012 5 5 Page AT32UC3A3 Table 3-1. GPIO Controller Function Multiplexing G P PIN BGA QFP BGA I Type 144 144 100 PIN O Supply (2) A L6 84 H9(1) PX18 69 VDDIO x2 EBI - ADDR[16] D5 35 F1(1) PX19 70 VDDIO x2 EBI - ADDR[15] L4 73 H6(1) PX20 71 VDDIO x2 EBI - ADDR[14] M5 80 H2 PX21 72 VDDIO x2 EBI - ADDR[13] M1 72 K10(1) PX22 73 VDDIO x2 EBI - ADDR[12] M6 85 K1 PX23 74 VDDIO x2 EBI - ADDR[11] M7 86 M8 92 L9 90 J2 PX24 75 VDDIO x2 EBI - ADDR[10] H4 PX25 76 VDDIO x2 EBI - ADDR[9] J3 PX26 77 VDDIO x2 EBI - ADDR[8] K9 89 K2 PX27 78 VDDIO x2 EBI - ADDR[7] L10 K11 M11 91 94 96 K3 PX28 79 VDDIO x2 EBI - ADDR[6] J4 PX29 80 VDDIO x2 EBI - ADDR[5] G5 PX30 81 VDDIO x2 EBI - ADDR[4] M10 97 H5 PX31 82 VDDIO x2 EBI - ADDR[3] M9 93 K4(1) PX32 83 VDDIO x2 EBI - ADDR[2] M12 95 PX33 84 VDDIO x2 EBI - ADDR[1] J3 61 PX34 85 VDDIO x2 EBI - ADDR[0] C2 38 PX35 86 VDDIO x2 EBI - DATA[15] D3 44 D2 45 PX36 87 VDDIO x2 EBI - DATA[14] PX37 88 VDDIO x2 EBI - DATA[13] E1 51 PX38 89 VDDIO x2 EBI - DATA[12] F1 52 A1 36 M2 71 M3 69 PX39 90 VDDIO x2 EBI - DATA[11] PX40 91 VDDIO x2 PX41 92 VDDIO x2 EBI - CAS PX42 93 VDDIO x2 EBI - RAS L7 88 PX43 94 VDDIO x2 EBI - SDA10 K2 66 PX44 95 VDDIO x2 EBI - SDWE L3 70 J7(1) PX45 96 VDDIO x3 EBI - SDCK K4 74 G6(1) PX46 97 VDDIO x2 EBI - SDCKE D4 39 E1(1) PX47 98 VDDIO x2 EBI - NANDOE F5 41 PX48 99 VDDIO x2 EBI - ADDR[23] F4 43 PX49 100 VDDIO x2 EBI - CFRNW G4 75 PX50 101 VDDIO x2 EBI - CFCE2 G5 77 PX51 102 VDDIO x2 K7 87 PX52 103 VDDIO x2 E4 42 D4(1) PX53 104 VDDIO x2 EBI - CFCE1 EBI - NCS[3] EBI - NCS[2] E3 46 PX54 105 VDDIO x2 EBI - NWAIT J5 79 PX55 106 VDDIO x2 EBI - ADDR[22] GPIO function B DMACA - DMAACK[1] EIC - SCAN[0] EIC - SCAN[1] EIC - SCAN[2] EIC - SCAN[3] EIC - SCAN[4] EIC - SCAN[5] EIC - SCAN[6] EIC - SCAN[7] SPI0 - MISO SPI0 - MOSI SPI0 - SPCK SPI0 - NPCS[0] SPI0 - NPCS[1] SPI0 - NPCS[2] SPI0 - NPCS[3] SPI1 - MISO SPI1 - MOSI SPI1 - SPCK SPI1 - NPCS[0] SPI1 - NPCS[1] SPI1 - NPCS[2] MCI - CLK C TC0 - A2 TC0 - B2 TC0 - CLK0 TC0 - CLK1 TC0 - CLK2 SSC - TX_CLOCK SSC - TX_DATA SSC - RX_DATA SSC - RX_FRAME_SYNC SSC - TX_FRAME_SYNC SSC - RX_CLOCK PM - GCLK[0] PM - GCLK[1] PM - GCLK[2] PM - GCLK[3] USART1 - DCD USART1 - DSR USART1 - RI USART1 - DTR ADC - TRIGGER USB - VBOF USB - ID TC1 - B2 DMACA - DMAACK[0] DMACA - DMARQ[0] USART3 - TXD EIC - SCAN[3] MCI - DATA[11] MCI - DATA[10] MCI - DATA[9] MCI - DATA[8] MCI - DATA[15] MCI - DATA[14] MCI - DATA[13] MCI - DATA[12] USART2 - RXD D 32072H–AVR32–10/2012 11 11 Page

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