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PDF UM10336 Data sheet ( Hoja de datos )
| Número de pieza | UM10336 | |
| Descripción | User Manual | |
| Fabricantes | NXP Semiconductors | |
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UM10336
P89LPC9201/9211/922A1/9241/9251 User manual
Rev. 01 — 22 April 2009
User manual
Document information
Info Content
Keywords
P89LPC9201/9211/922A1/9241/9251
Abstract
Technical information for the P89LPC9201/9211/922A1/9241/9251 device
1 page  
NXP Semiconductors
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UM10336
P89LPC9201/9211/922A1/9241/9251 User manual
Table 1. Pin description …continued
Symbol
Pin Type Description
P0.3/CIN1B/
KBI3/AD12
P0.4/CIN1A/
KBI4/DAC1/AD13
P0.5/CMPREF/
KBI5
P0.6/CMP1/KBI6
P0.7/T1/KBI7
P1.0 to P1.7
P1.0/TXD
P1.1/RXD
P1.2/T0/SCL
P1.3/INT0/SDA
P1.4/INT1
TSSOP20,
DIP20
18 I/O P0.3 — Port 0 bit 3. High current source.
I CIN1B — Comparator 1 positive input B.
I KBI3 — Keyboard input 3.
I AD12 — ADC1 channel 2 analog input. (P89LPC9241/9251)
17 I/O P0.4 — Port 0 bit 4. High current source.
I CIN1A — Comparator 1 positive input A.
I KBI4 — Keyboard input 4.
O DAC1 — Digital-to-analog converter output 1. (P89LPC9241/9251)
I AD13 — ADC1 channel 3 analog input. (P89LPC9241/9251)
16 I/O P0.5 — Port 0 bit 5. High current source.
I CMPREF — Comparator reference (negative) input.
I KBI5 — Keyboard input 5.
14 I/O P0.6 — Port 0 bit 6. High current source.
O CMP1 — Comparator 1 output.
I KBI6 — Keyboard input 6.
13 I/O P0.7 — Port 0 bit 7. High current source.
I/O T1 — Timer/counter 1 external count input or overflow output.
I KBI7 — Keyboard input 7.
I/O, I
[1]
Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type, except for
three pins as noted below. During reset Port 1 latches are configured in the input
only mode with the internal pull-up disabled. The operation of the configurable
Port 1 pins as inputs and outputs depends upon the port configuration selected.
Each of the configurable port pins are programmed independently. Refer to
Section 5.1 “Port configurations” for details. P1.2 to P1.3 are open drain when
used as outputs. P1.5 is input only.
All pins have Schmitt trigger inputs.
Port 1 also provides various special functions as described below:
12 I/O P1.0 — Port 1 bit 0.
O TXD — Transmitter output for serial port.
11 I/O P1.1 — Port 1 bit 1.
I RXD — Receiver input for serial port.
10 I/O P1.2 — Port 1 bit 2 (open-drain when used as output).
I/O T0 — Timer/counter 0 external count input or overflow output (open-drain when
used as output).
I/O SCL — I2C-bus serial clock input/output.
9 I/O P1.3 — Port 1 bit 3 (open-drain when used as output).
I INT0 — External interrupt 0 input.
I/O SDA — I2C-bus serial data input/output.
8 I/O P1.4 — Port 1 bit 4. High current source.
I INT1 — External interrupt 1 input.
UM10336_1
User manual
Rev. 01 — 22 April 2009
© NXP B.V. 2009. All rights reserved.
5 of 126
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Table 2. Special function registers - P89LPC9201/9211/922A1
* indicates SFRs that are bit addressable.
Name
Description
SFR Bit functions and addresses
addr. MSB
LSB
Reset value
Hex Binary
Bit address E7 E6 E5 E4 E3 E2 E1 E0
ACC*
Accumulator E0H
00 0000 0000
AUXR1
Auxiliary
function
register
A2H CLKLP
EBRR
ENT1
ENT0
SRST
0
-
DPS 00
0000 00x0
Bit address F7 F6 F5 F4 F3 F2 F1 F0
B*
B register
F0H
00 0000 0000
BRGR0[2]
Baud rate
generator 0
rate low
BEH
00 0000 0000
BRGR1[2]
Baud rate
generator 0
rate high
BFH
00 0000 0000
BRGCON Baud rate
BDH
-
-
-
-
-
- SBRGS BRGEN 00[2] xxxx xx00
generator 0
control
CMP1
Comparator 1 ACH
control register
-
-
CE1
CP1
CN1
OE1
CO1
CMF1 00[1] xx00 0000
CMP2
Comparator 2 ADH
control register
-
-
CE2
CP2
CN2
OE2
CO2
CMF2 00[1] xx00 0000
DIVM
CPU clock
divide-by-M
control
95H
00 0000 0000
DPTR
Data pointer
(2 bytes)
DPH
Data pointer
high
83H
00 0000 0000
DPL Data pointer 82H
low
00 0000 0000
FMADRH Program flash E7H
address high
00 0000 0000
FMADRL
Program flash E6H
address low
00 0000 0000
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