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ZL30146 데이터시트 PDF




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부품번호 ZL30146 기능
기능 SyncE SONET/SDH Line Card PLL
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ZL30146 데이터시트, 핀배열, 회로
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ZL30146
SyncE SONET/SDH Line Card PLL
Features
• Synchronizes to standard telecom or Ethernet
backplane clocks and provides jitter filtered output
clocks for SONET/SDH, PDH and Ethernet network
interface cards
• Supports the requirements of ITU-T G.8262 for
synchronous Ethernet Equipment slave Clocks
• Meets the SONET/SDH jitter generation
requirements up to OC-192/STM-64
• Two independent DPLLs provides timing for the
transmit path (backplane to line rate) and the
receive path (recovered line rate to backplane)
• Synchronizes to telecom reference clocks (2 kHz,
N*8 kHz up to 77.76 MHz, 155.52 MHz) or to
Ethernet reference clocks (25 MHz, 50 MHz,
62.5 MHz, 125 MHz)
• Selectable loop bandwidth of 14 Hz, 28 Hz, 890 Hz,
3.5 Hz, 1.7 Hz, or 0.1 Hz
• Supports automatic hitless reference switching and
short term holdover during loss of reference inputs
• Generates standard SONET/SDH clock rates (e.g.,
19.44 MHz, 38.88 MHz, 77.76 MHz, 155.52 MHz,
622.08 MHz) or Ethernet clock rates (e.g., 25 MHz,
50 MHz, 125 MHz, 156.25 MHz, 312.5 MHz) for
synchronizing Ethernet PHYs
Short Form Data Sheet
February 2009
Ordering Information
ZL30146GGG 64 Pin CABGA
ZL30146GGG2 64 Pin CABGA*
*Pb Free Tin/Silver/Copper
-40oC to +85oC
Trays
Trays
• Programmable output synthesizer to generate
telecom clock frequencies from any multiple of
8 kHz up to 100 MHz (e.g., T1/E1, DS3/E3)
• Generates several styles of output frame pulse
with selectable pulse width, polarity, and frequency
• Configurable input to output delay and output to
output phase alignment
• Configurable through a serial interface (SPI or I2C)
• DPLLs can be configured to provide synchronous
or asynchronous clock outputs
Applications
• ITU-T G.8262 Line Cards which support 1 GbE
and 10 GbE interfaces
• SONET/SDH line cards up to OC-192/STM-64
osci
osco
ref0
ref1
ref2
ref3
ref4
sync0
Input
Ports
Ref/Sync
Monitors
refm Rx DPLL
refn/syncn
Tx DPLL
P rogram m able
S yn th e s iz e r
N*8kHz
p_clk
p_fp
Ethernet/
SONET
APLL
diff
apll_clk
mode hold lock
I2C/SPI
JTAG
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2009, Zarlink Semiconductor Inc. All Rights Reserved.




ZL30146 pdf, 반도체, 판매, 대치품
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visit our Web Site at
www.zarlink.com
Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable.
However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such
information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or
use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual
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certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink.
This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part
of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other
information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the
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any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and
suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does
not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in
significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request.
Purchase of Zarlink’s I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system
conforms to the I2C Standard Specification as defined by Philips.
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trademarks of Zarlink Semiconductor Inc.
TECHNICAL DOCUMENTATION - NOT FOR RESALE

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