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PDF STD95N4LF3 Data sheet ( Hoja de datos )
| Número de pieza | STD95N4LF3 | |
| Descripción | Power MOSFETs | |
| Fabricantes | ST Microelectronics | |
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STD95N4LF3
N-channel 40 V, 5.0 mΩ, 80 A DPAK
STripFET™ Power MOSFET
Features
Type
VDSS
RDS(on)
max
STD95N4LF3 40 V < 6.0 mΩ
1. Value limited by wire bonding
■ 100% avalanche tested
■ Logic level drive
ID PD
80 A(1) 110 W
Applications
■ Switching application
– Automotive
Description
This N-channel enhancement mode Power
MOSFET is the latest refinement of
STMicroelectronics’ unique "single feature size"
strip-based process with fewer critical alignment
steps and therefore exceptional manufacturing
reproducibility. The resulting transistor has
extremely high packing density for low on
resistance, rugged avalanche characteristics and
low gate charge.
Table 1. Device summary
Order code
STD95N4LF3
Marking
95N4L
3
1
DPAK
Figure 1. Internal schematic diagram
D (TAB or 2)
G(1)
S(3)
AM01474v1
Package
DPAK
Packaging
Tape and reel
February 2009
Rev 1
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14
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Electrical characteristics
Table 6.
Symbol
Source drain diode
Parameter
Test conditions
Min. Typ. Max. Unit
ISD
ISDM (1)
VSD (2)
trr
Qrr
IRRM
Source-drain current
Source-drain current
(pulsed)
Forward on voltage
ISD = 80 A, VGS = 0
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 80 A, di/dt = 100 A/µs,
VDD = 20 V, Tj = 150 °C
(see Figure 15 and
Figure 19)
1. Pulse width limited by safe operating area.
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
80 A
320 A
1.5 V
40 ns
55 nC
3A
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Package mechanical data
DIM.
A
A1
A2
b
b4
c
c2
D
D1
E
E1
e
e1
H
L
L1
L2
L4
R
V2
TO-252 (DPAK) mechanical data
min.
2.20
0.90
0.03
0.64
5.20
0.45
0.48
6.00
6.40
4.40
9.35
1
0.60
0o
mm.
typ
5.10
4.70
2.28
2.80
0.80
0.20
max.
2.40
1.10
0.23
0.90
5.40
0.60
0.60
6.20
6.60
4.60
10.10
1
8o
0068772_G
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