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부품번호 | KKA8842 기능 |
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기능 | I2C BUS CONTROLLED SINGLE CHIP TV-RECEIVER | ||
제조업체 | KODENSHI KOREA | ||
로고 | |||
www.DataSheet4U.com
TECHNICAL DATA
I2C BUS CONTROLLED SINGLE CHIP TV-RECEIVER
The KKA 8842 is I2C-bus controlled single chip TV processor which is intended to be applied in PAL,
NTSC, PAL/NTSC and multi-standard television receivers.
FEATURES
The following features are available:
• Multi-standard vision IF circuit with an alignment-free PLL
demodulator without external components
• Alignment-free multi-standard FM sound demodulator (4.5 MHz
to 6.5 MHz)
• Audio switch
• Automatic Volume Limiting
• Flexible source selection with CVBS switch and Y(CVBS)/C input
so that a comb filter can be applied
• Integrated chrominance trap circuit
• Integrated luminance delay line
• Asymmetrical peaking in the luminance channel with a
(defeatable) noise coring function
• PAL/SECAM/NTSC decoder
• Base-band delay line for PAL and SECAM or chroma comb filter
for NTSC
• Black stretching of non-standard CVBS or luminance signals
• Integrated chroma band-pass filter with switchable centre
frequency
• Dynamic skin tone control circuit
• Blue stretch circuit which offsets colours near white towards blue
• RGB control circuit with "Continuous Cathode Calibration" and
white point adjustment
• Possibility to insert a "blue back" option when no video signal is
available
• Horizontal synchronization with two control loops and alignment-
free horizontal oscillator
• Vertical count-down circuit
• Vertical driver optimised for DC-coupled vertical output stages
• I2C-bus control of various functions
1
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Table 1 Input status bits.
FUNCTION
Control 0
Control 1
Hue
Horizontal shift (HS)
Vertical slope (VS)
Vertical amplitude (VA)
S-correction (SC)
Vertical shift (VSH)
White point R
White point G
White point B
Peaking
Brightness
Saturation
Contrast
AGC take-over
Volume control
Adjustment IF-PLL
Control 2
Control 3
Control 4
Control 5
KKA8842
SUB
ADDRE
SS
(HEX)
00
01
02
03
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14
15
18
19
1A
1B
DATA BYTE
D7 D6 D5
INA
FOR
F
AVL
VIM
NCI
N
VID
0
SBL
0
0
MAT
0
RBL
IE1
AFW
MO
D
SM
IFA
OSO
HOB
0
INB
FOR
S
AKB
GAI
STM
LBM
EVG
PRD
0
0
0
0
COR
0
IFS
VS
W
FAV
IFB
VSD
BPS
0
INC
DL
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
IFC
CB
ACL
0
000
D4 D3 D2
BCO FOA FOB
STB POC CM2
A4 A3 A2
A4 A3 A2
A4 A3 A2
A4 A3 A2
A4 A3 A2
A4 A3 A2
A4 A3 A2
A4 A3 A2
A4 A3 A2
A4 A3 A2
A4 A3 A2
A4 A3 A2
A4 A3 A2
A4 A3 A2
A4
0
BLS
CMB
0
A3
0
BKS
AST
0
A2
0
0
CL2
0
000
D1 D0
XA
CM1
A1
A1
A1
XB
CM
0
A0
A0
A0
A1 A0
A1 A0
A1 A0
A1 A0
A1 A0
A1 A0
A1 A0
A1 A0
A1 A0
A1 A0
A1 A0
A1 A0
00
0 BB
CL1 CL0
FFI EB
S
0 FC
O
4
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KKA8842
delay time of identification after the
AGC has stabilized on a new
transmitter
Sound circuit
DEMODULATOR INPUT; (PIN 1)
input limiting for PLL catching range
(RMS value)
Catching range PLL
input resistance
input capacitance
AM rejection
DE-EMPHASIS (PIN 55)
output signal amplitude (RMS value)
output resistance
DC output voltage
AUDIO OUTPUT (PIN 15)
Controlled output signal amplitude
(RMS value)
output resistance
DC output voltage
total harmonic distortion
VI = 50 mV RMS;
-6 dB;
--
-1
4,2 -
- 8,5
--
60 66
- 500
- 15
-3
500 700
- 500
-3
- 0,15
total harmonic distortion
FAV = 1;
- 0,15
power supply rejection
- 25
Internal signal-to-noise ratio
- 60
External signal-to-noise ratio
- 80
output level variation with temperature
--
control range
- 80
Suppression of output signal when
- 80
mute is active
DC shift of the output when mute is
- 50
active
EXTERNAL AUDIO INPUT; (PIN 2)
input signal amplitude (RMS value)
- 500
input resistance
- 25
voltage gain difference between input maximum volume
-9
and output
Crosstalk between internal and
60 -
external audio signals
AUTOMATIC VOLUME LEVELLING; CAPACITOR CONNECTED TO PIN 45;
gain at maximum boost
-6
gain at minimum boost
- -14
charge (attack) current
-1
Discharge (decay) current
- 200
control voltage at maximum boost
-1
control voltage at minimum boost
-5
CVBS, Y/C, RGB, CD AND LUMINANCE OUT- AND INPUTS
CVBS-Y/C SWITCH, PINS 10, 11, 13, 17 AND 38
CVBS or Y input voltage (peak-to-peak
-1
value)
CVBS or Y input current
-4
suppression of non-selected CVBS
50 -
input signal
chrominance input voltage (burst
- 0,3
amplitude)
10 ms
2 mV
6,8 MHz
-k
5 pF
- dB
- mV
-k
-V
900 mV
-
-V
0,5 %
0,5 %
- dB
- dB
- dB
tbf dB
- dB
- dB
100 mV
2000 mV
-k
- dB
- dB
- dB
- dB
- mA
- nA
-V
-V
1,4 V
- µA
- dB
1V
7
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부품번호 | 상세설명 및 기능 | 제조사 |
KKA8842 | I2C BUS CONTROLLED SINGLE CHIP TV-RECEIVER | KODENSHI KOREA |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |