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PDF STP16CPC05 Data sheet ( Hoja de datos )

Número de pieza STP16CPC05
Descripción LED Driver
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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STP16CPC05
Low voltage 16-bit constant current LED sink driver
Features
Low voltage power supply down to 3 V
16 constant current output channels
Adjustable output current through external
resistor
Serial data IN/parallel data OUT
Can be driven by a 3.3 V microcontroller
Output current: 5-100 mA
Max clock frequency 30 MHz
ESD protection 2.5 kV HBM, 200 V MM
Description
The STP16CPC05 is a monolithic, low voltage,
low current power 16-bit shift register designed for
LED panel displays. The STP16CPC05 contains
a 16-bit serial-in, parallel-out shift register that
feeds a 16-bit, D-type storage register. In the
output stage, sixteen regulated current sources
provide from 5 mA to 100 mA constant current to
drive the LEDs.
The STP16CPC05`s output stage is designed to
optimize the turn-on and turn-off time, typically
100 nS. The balanced turning ON/OFF improves
the system performances reducing the bypass
capacitance in applications where parasitic
inductance generate ringing or noise in the
system. The LEDs' brightness can be controlled
by using an external resistor to adjust the
STP16CPC05 output current.
QSOP-24
SO-24
TSSOP24
TSSOP24
(exposed pad)
The STP16CPC05 guarantees a 20 V output
driving capability, allowing users to connect more
LEDs in series.The high clock frequency, 30 MHz,
makes the device suitable for high data rate
transmission. The 3.3 V voltage supply is useful in
applications that interface with a 3.3 V
micro-controller.
Table 1. Device summary
Order codes
STP16CPC05MTR
STP16CPC05TTR
STP16CPC05XTTR
STP16CPC05PTR
Package
SO-24
TSSOP24
TSSOP24 exposed pad
QSOP-24
Packaging
1000 parts per reel
2500 parts per reel
2500 parts per reel
2500 parts per reel
May 2009
Doc ID 15352 Rev 2
1/27
www.st.com
27

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STP16CPC05 pdf
www.DataSShTeePt41U6.CcoPmC05
Electrical ratings
2.3 Recommended operating conditions
Table 6.
Symbol
Recommended operating conditions TA = 25 °C
Parameter
Test conditions
Min
Typ
Max Unit
VDD Supply voltage
3.0 - 5.5 V
VO Output voltage
- 20 V
IO Output current
OUTn
3 - 100 mA
IOH Output current
SERIAL-OUT
- +1 mA
IOL Output current
SERIAL-OUT
- -1 mA
VIH Input voltage
0.7VDD
- VDD+0.3 V
VIL Input voltage
-0.3
-
0.3VDD
V
twLAT LE pulse width
20 -
ns
twCLK CLK pulse width
16 -
ns
twEN OE pulse width
tSETUP(D) Setup time for DATA
VDD = 3.3 V to 5.0 V
200
8
-
-
ns
ns
tHOLD(D) Hold time for DATA
4-
ns
tSETUP(L) Setup time for LATCH
fCLK Clock frequency
Cascade operation (1)
VDD = 5 V
5
- ns
- 30 MHz
1. If the device is connected in cascade, it may not be possible achieve the maximum data transfer. Please
considered the timings carefully.
Doc ID 15352 Rev 2
5/27

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Figure 9. Clock, serial-in, serial-out
Timing diagrams
Doc ID 15352 Rev 2
11/27

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