|
|
PDF SYS82000RKXC-12 Data sheet ( Hoja de datos )
| Número de pieza | SYS82000RKXC-12 | |
| Descripción | 2M x 8 SRAM MODULE | |
| Fabricantes | MOSAIC | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de SYS82000RKXC-12 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
2M x 8 SRAM MODULE
SYS82000RKXC - 70/85/10/12
Issue 1.3 : April 2001
Description
The SYS82000RKXC is a plastic 16Mbit Static
RAM Module housed in a standard 38 pin Single In-
Line package organised as 2M x 8 with access
times of 85,100, or 120 ns.
The module is constructed using four 512Kx8
SRAMs in TSOPII packages mounted onto an FR4
epoxy substrate. This offers an extremely high
PCB packing density.
The device is offered in standard and low power
versions, with the -L module having a low voltage
data retention mode for battery backed applications.
Features
• Access Times of 85/100/120 ns.
• Low Power Disapation:
Operating
Standby-L Version
600 mW (Max.)
1.1 mW (Max.)
• 5 Volt Supply ± 10%.
• Completely Static Operation.
• Low Voltage VCC Data Retention.
• On-board Decoding & Decoupling Capacitors.
• 38 Pin Single-In-Line package (SIP).
• Upgrade path to SYS84000RKXC (32Mbits).
Block Diagram
D0 - D7
A0 - A18
OE
WE
512K x 8
SRAM
CS
512K x 8
SRAM
CS
512K x 8
SRAM
CS
512K x 8
SRAM
CS
A19
A20 DECODER
CS
Pin Functions
Address Inputs
Data Input/Output
Chip Select
Write Enable
Output Enable
No Connect
Power (+5V)
Ground
A0 ~ A20
D0 ~ D7
CS
WE
OE
NC
VCC
GND
Pin Definition
NC
A20
Vcc
WE
D2
D3
D0
A1
A2
A3
A4
GND
D5
A10
A11
A5
A13
A14
A19
CS
A15
A16
A12
A18
A6
D1
GND
A0
A7
A8
A9
D7
D4
D6
A17
Vcc
OE
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
Pin 38 is A21 on the
SYS84000RKXC upgrade module.
Package Details
Plastic 38 pin Single-In-Line (SIP)
1 page  
SYS82000RKXC - 85/10/12
ISSUE 1.3 April 2001
Read Cycle Timing Waveform (1,2)
www.DataSheet4U.com
Address
OE
CS
Dout
t RC
t AA
t OE
t OLZ
t ACS
t CLZ (4,5)
t OH
t OHZ (3)
Data Valid
tCHZ (3,4,5)
Don't
care.
AC Read Characteristics Notes
(1) WE is High for Read Cycle.
(2) All read cycle timing is referenced from the last valid address to the first transition address.
(3) tCHZ and tOHZ are defined as the time at which the outputs achieve open circuit conditions and are
not referenced to output voltage levels.
(4) At any given temperature and voltage condition, tCHZ (max) is less than tCLZ (min) both for a given module
and from module to module.
(5) These parameters are sampled and not 100% tested.
Write Cycle No.1 Timing Waveform(1,4)
Address
OE
CS
WE
Dout
Din
tWC
t AS(6)
t AW
t CW
t WR(7)
t OHZ(3,9)
High-Z
t WP(2)
High-Z
tOW
t DW t DH
Data Valid
Don't
Care
(8)
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet SYS82000RKXC-12.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| SYS82000RKXC-10 | 2M x 8 SRAM MODULE | MOSAIC |
| SYS82000RKXC-12 | 2M x 8 SRAM MODULE | MOSAIC |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |