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PDF ADP2114 Data sheet ( Hoja de datos )
| Número de pieza | ADP2114 | |
| Descripción | Synchronous Step-Down DC-to-DC Regulator | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Configurable, Dual 2 A/Single 4 A,
Synchronous Step-Down DC-to-DC Regulator
ADP2114
FEATURES
Configurable 2 A/2 A or 3 A/1 A dual output load
combinations or 4 A combined single output
High efficiency: up to 95%
Input voltage VIN: 2.75 V to 5.5 V
Selectable fixed output: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V or
adjustable output voltage to 0.6 V minimum
±1.5% accurate reference voltage
Selectable switching frequency: 300 kHz, 600 kHz, 1.2 MHz
or synchronized from 200 kHz to 2 MHz
Optimized gate slew rate for reduced EMI
External synchronization input or internal clock output
Dual-phase, 180° phase shifted PWM channels
Current mode for fast transient response
Pulse skip under light load or forced PWM operation
Input undervoltage lockout (UVLO)
Independent enable inputs and PGOOD outputs
Overcurrent and thermal overload protection
Externally programmable soft start
32-lead 5 mm × 5 mm LFCSP package
APPLICATIONS
Point of load regulation
Telecommunications and networking systems
Consumer electronics
Industrial and Instrumentation
Medical
GENERAL DESCRIPTION
The ADP2114 is a versatile, synchronous step-down, switching
regulator that satisfies a wide range of customer point-of-load
requirements. The two PWM channels can be configured to
deliver independent outputs at 2 A and 2 A (or 3 A/1 A) or can be
configured as a single interleaved output capable of delivering 4 A.
The two PWM channels are 180º phase shifted to reduce input
ripple current and to reduce input capacitance.
The ADP2114 provides high efficiency and operates at switching
frequencies of up to 2 MHz. At light loads, the ADP2114 can be
set to operate in pulse skip mode for higher efficiency or in forced
PWM mode to reduce EMI.
The ADP2114 is designed with an optimized gate slew rate to reduce
EMI emissions, allowing it to power sensitive, high performance
signal chain circuits. The switching frequency can be set to 300 kHz,
600 kHz, or 1.2 MHz and can be synchronized to an external clock
that minimizes the system noise. The bidirectional synchronization
pin is also configurable as a 90° out-of-phase output clock, providing
the possibility for a stackable multiphase power solution.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
TYPICAL APPLICATION CIRCUIT
VIN = 5V
100kΩ
22µF
PGOOD2
VOUT2 = 1.8V, 2A 2.2µH
22µF 47µF
SYNC
15kΩ
22kΩ
1.2nF
10nF
10Ω
1µF
EN2
EN1
VIN4
VIN1
VIN5
VIN2
VIN6
PGOOD2
VIN3
PGOOD1
SW3
ADP2114
SW1
SW2
SW4
PGND1
PGND3
PGND2
PGND4
FB1
FB2
V2SET
V1SET
SYNC/CLKOUT
COMP2
SS2
COMP1
SS1
100kΩ
22µF
4.7µH
PGOOD1
VOUT1 = 3.3V, 2A
47µF
47kΩ
10nF 22kΩ
8.2kΩ
1.2nF
fSW = 600kHz
Figure 1.
The ADP2114 input voltage range is from 2.75 V to 5.5 V, and it
converts to fixed outputs of 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, or
3.3 V that can be set independently for each channel using
external resistors. Using a resistor divider, it is also possible to
set the output voltage as low as 0.6 V. The ADP2114 operates
over the −40°C to +125°C junction temperature range.
100
VIN = 3.3V; VOUT = 1.8V
95
VIN = 5.0V; VOUT = 3.3V
90
85
80
VIN = 5.0V; VOUT = 1.8V
75
70
0.01
0.1 1
LOAD CURRENT (A)
3
Figure 2. Typical Efficiency vs. Load Current
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
1 page  
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ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
VDD to GND
VIN1, VIN2, VIN3, VIN4, VIN5, VIN6 to
PGND1, PGND2, PGND3, PGND4
EN1, EN2, SCFG, FREQ, FB1, FB2, SYNC/
CLKOUT, PGOOD1, PGOOD2, V1SET,
V2SET, COMP1, COMP2, SS1, SS2 to GND
FB1, FB2 to GND
SW1, SW2, SW3, SW4 to PGND1, PGND2,
PGND3, PGND4
PGND1, PGND2, PGND3, PGND4 to GND
VIN1, VIN2, VIN3, VIN4, VIN5, VIN6 to VDD
θJA, JEDEC 1S2P PCB, Natural Convection
Operating Junction Temperature Range
Storage Temperature Range
Maximum Soldering Lead
Temperature (10 sec)
Rating
−0.3 V to +6 V
−0.3 V to +6 V
−0.3 V to (VDD + 0.3 V)
−0.3V to +3.6V
−0.3 V to (VDD + 0.3 V)
±0.3 V
±0.3 V
34°C/W
−40°C to +125°C
−65°C to +150°C
260°C
ADP2114
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Absolute maximum ratings apply individually only, not in
combination.
ESD CAUTION
Rev. 0 | Page 5 of 40
5 Page 
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330
320
310
VIN = 2.75V
300 VIN = 5.5V
290
280
270
–50
–25
0 25 50 75
TEMPERATURE (°C)
100 125
Figure 20. Switching Frequency vs. Temperature, fSW = 300 kHz
660
640
620 VIN = 2.75V
600 VIN = 5.5V
580
560
540
–50
–25
0 25 50 75
TEMPERATURE (°C)
100 125
Figure 21. Switching Frequency vs. Temperature, fSW = 600 kHz
1300
1280
1260
1240
1220
1200
1180
1160
1140
1120
1100
2.5 3.0 3.5 4.0 4.5 5.0 5.5
VIN (V)
Figure 22. Switching Frequency vs. Input Voltage, fSW = 1.2 MHz
ADP2114
2.0
1.9
1.8
1.7
1.6
1.5
ENABLE; VIN = 5.5V
ENABLE; VIN = 2.75V
1.4 DISABLE; VIN = 5.5V
1.3 DISABLE; VIN = 2.75V
1.2
1.1
1.0
0.9
0.8
–50
–25
0 25 50 75
TEMPERATURE (°C)
100 125
Figure 23. Enable/Disable Threshold vs. Temperature
2.8
2.7
VDD RISING
2.6
2.5
VDD FALLING
2.4
2.3
–50
–25 0
25 50 75 100
TEMPERATURE (°C)
Figure 24. UVLO Threshold vs. Temperature
125
1300
1280
1260
1240
1220
VIN = 2.75 V
1200
1180
VIN = 5.5 V
1160
1140
1120
1100
–50
–25
0 25 50 75
TEMPERATURE (°C)
100 125
Figure 25. Switching Frequency vs. Temperature, fSW = 1.2 MHz
Rev. 0 | Page 11 of 40
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADP2114.PDF ] | |
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