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CS1124 데이터시트 PDF




ON Semiconductor에서 제조한 전자 부품 CS1124은 전자 산업 및 응용 분야에서
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부품번호 CS1124 기능
기능 Dual Variable-Reluctance Sensor Interface IC
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CS1124 데이터시트, 핀배열, 회로
CS1124www.DataSheet4U.com
Dual Variable-Reluctance
Sensor Interface IC
The CS1124 is a monolithic integrated circuit designed primarily to
condition signals used to monitor rotating parts.
The CS1124 is a dual channel device. Each channel interfaces to a
Variable Reluctance Sensor, and monitors the signal produced when a
metal object is moved past that sensor. An output is generated that is a
comparison of the input voltage and the voltage produced at the INAdj
lead. The resulting square–wave is available at the OUT pin.
When the DIAG pin is high, the reference voltage at INAdj is
increased. This then requires a larger signal at the input to trip the
comparator, and provides for a procedure to test for an open sensor.
Features
Dual Channel Capability
Built–In Test Mode
On–Chip Input Voltage Clamping
Works from 5.0 V Supply
Accurate Built–In Hysteresis
VCC
DIAG
R1 IN1
RRS
C1
VRS
Variable
Reluctance
Sensor
R2
RRS
IN2
C2
VRS
Variable
Reluctance
Sensor
VCC VCC VCC
INP1
VCC
INAdj
Active
Clamp
+
COMP1
OUT1
To µP
VCC
INP2
Active
Clamp
VCC
+
COMP2
OUT2
To µP
RAdj
GND
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8
1
SO–8
D SUFFIX
CASE 751
PIN CONNECTIONS AND
MARKING DIAGRAM
1
INAdj
IN1
IN2
GND
8
VCC
OUT1
OUT2
DIAG
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
CS1124YD8
SO–8
95 Units/Rail
CS1124YDR8
SO–8 2500 Tape & Reel
Figure 1. Block Diagram
© Semiconductor Components Industries, LLC, 2001
April, 2001 – Rev. 6
1
Publication Order Number:
CS1124/D




CS1124 pdf, 반도체, 판매, 대치품
CS1124
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V– + INAdj RAdj
(2)
As VRS begins to rise and fall, it will be superimposed on
the DC biased voltage at V+.
V+ + INP1(R1 ) RRS) ) VRS
(3)
To get comparator COMP1 to trip, the following
condition is needed when crossing in the positive direction,
V+ u V– ) VHYS
(4)
(VHYS is the built–in hysteresis set to 160 mV), or when
crossing in the negative direction,
V+ t V– * VHYS
(5)
Combining equations 2, 3, and 4, we get:
INP1(R1 ) RRS) ) VRS u INAdj RAdj ) VHYS (6)
therefore,
VRS(+TRP) t INAdj RAdj * INP1(R1 ) RRS) ) VHYS
(7)
It should be evident that tripping on the negative side is:
VRS(–TRP) t INAdj RAdj * INP1(R1 ) RRS) * VHYS
(8)
In normal mode,
INP1 + INAdj
(9)
We can now re–write equation (7) as:
VRS(+TR) u INP1(RAdj * R1 * RRS) ) VHYS (10)
By making
RAdj + R1 ) RRS
(11)
you can detect signals with as little amplitude as VHYS.
A design example is given in the applications section.
OPEN SENSOR PROTECTION
The CS1124 has a DIAG pin that when pulled high (5.0 V),
will increase the INAdj current source by roughly 50%.
Equation (7) shows that a larger VRS(+TRP) voltage will be
needed to trip comparator COMP1. However, if no VRS
signal is present, then we can use equations 1, 2, and 4
(equation 5 does not apply in this mode) to get:
INP1(R1 ) RRS) u INP1 KI RAdj ) VHYS (12)
Since RRS is the only unknown variable we can solve for
RRS,
RRS + INP1
KI
RAdj
INP1
)
VHYS
*
R1
(13)
Equation (13) shows that if the output switches states
when entering the diag mode with VRS = 0, the sensor
impedance must be greater than the above calculated value.
This can be very useful in diagnosing intermittent sensor.
INPUT PROTECTION
As shown in Figure 2, an active clamp is provided on each
input to limit the voltage on the input pin and prevent
substrate current injection. The clamp is specified to handle
±12 mA. This puts an upper limit on the amplitude of the
sensor output. For example, if R1 = 20 k, then
VRS(MAX) + 20 k 12 mA + 240 V
Therefore, the VRS(pk–pk) voltage can be as high as 480 V.
The CS1124 will typically run at a frequency up to 1.8 MHz
if the input signal does not activate the positive or negative
input clamps. Frequency performance will be lower when
the positive or negative clamps are active. Typical
performance will be up to a frequency of 680 kHz with the
clamps active.
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CS1124 전자부품, 판매, 대치품
CS1124
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–X–
A
PACKAGE DIMENSIONS
SO–8
D SUFFIX
CASE 751–07
ISSUE V
B
–Y–
–Z–
H
85
S 0.25 (0.010) M Y M
1
4
K
G
D
C
SEATING
PLANE
N X 45 _
0.10 (0.004)
M
0.25 (0.010) M Z Y S X S
J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
PACKAGE THERMAL DATA
Parameter
RΘJC
RΘJA
Typical
Typical
SO–8
45
165
Unit
°C/W
°C/W
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CS1124

Dual Variable-Reluctance Sensor Interface IC

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