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ADV3200 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 ADV3200은 전자 산업 및 응용 분야에서
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부품번호 ADV3200 기능
기능 (ADV3200 / ADV3201) 32 X 32 Buffered Analog Crosspoint Switch
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ADV3200 데이터시트, 핀배열, 회로
www.DataSheet4U.com
FEATURES
Large, 32 × 32, nonblocking switch array
G = +1 (ADV3200) or G = +2 (ADV3201) operation
Pin-compatible 32 × 16 versions available
(ADV3202/ADV3203)
Single 5 V supply, dual ±2.5 V supply, or
dual ±3.3 V supply (G = +2)
Serial programming of switch array
2:1 OSD insertion mux per output
Input sync-tip clamp
High impedance output disable allows connection of
multiple devices with minimal output bus load
Excellent video performance
60 MHz, 0.1 dB gain flatness
0.1% differential gain error (RL = 150 Ω)
0.1° differential phase error (RL = 150 Ω)
Excellent ac performance
Bandwidth: >300 MHz
Slew rate: >400 V/μs
Low power: 1.25 W
Low all hostile crosstalk of −48 dB @ 5 MHz
Reset pin allows disabling of all outputs
Connected through a capacitor to ground, provides
power-on reset capability
176-lead exposed pad LQFP (24 mm × 24 mm)
APPLICATIONS
CCTV surveillance
Routing of high speed signals including
Composite video (NTSC, PAL, S, SECAM)
RGB and component video routing
Compressed video (MPEG, Wavelet)
Video conferencing
GENERAL DESCRIPTION
The ADV3200/ADV3201 are 32 × 32 analog crosspoint switch
matrices. They feature a selectable sync-tip clamp input for
ac-coupled applications and an on-screen display (OSD)
insertion mux. With −48 dB of crosstalk and −80 dB isolation
at 5 MHz, the ADV3200/ADV3201 are useful in many high
density routing applications. The 0.1 dB flatness out to 60 MHz
makes the ADV3200/ADV3201 ideal for composite video
switching.
The 32 independent output buffers of the ADV3200/ADV3201
can be placed into a high impedance state for paralleling cross-
point outputs so that off channels present minimal loading to
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
300 MHz, 32 × 32 Buffered
Analog Crosspoint Switch
ADV3200/ADV3201
FUNCTIONAL BLOCK DIAGRAM
VPOS VNEG DVCC DGND
CLK
DATA IN
UPDATE
CS
RESET
ENABLE/
BYPASS
193-BIT SHIFT REGISTER
193
PARALLEL LATCH
192
32 × 5:32
DECODERS
ADV3200
(ADV3201)
32 ENABLE/
DISABLE
SYNC-TIP
CLAMP
1024
OUTPUT
BUFFER
G = +1
(G = +2)
DATA
OUT
32
INPUTS
...
...
SWITCH OSD
... ...MATRIX MUX
32
OUTPUTS
32
REFERENCE
32
VCLAMP
OSD
OSD VREF
INPUTS SWITCHES
Figure 1.
an output bus if building a larger array. The part is available
in a gain of +1 (ADV3200) or +2 (ADV3201) for ease of use in
back-terminated load applications. A single 5 V supply, dual
±2.5 V supplies, or dual ±3.3 V supplies (G = +2) can be used
while consuming only 250 mA of idle current with all outputs
enabled. The channel switching is performed via a double
buffered, serial digital control, which can accommodate daisy
chaining of several devices.
The ADV3200/ADV3201 are packaged in a 176-lead exposed
pad LQFP (24 mm × 24 mm) and are available over the
extended industrial temperature range of −40°C to +85°C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.




ADV3200 pdf, 반도체, 판매, 대치품
wwAwD.DVat3aS2h0ee0t4/UA.cDomV3201
Parameter
Input Capacitance
Input Resistance
Input Bias Current
SWITCHING CHARACTERISTICS
Enable On Time
Switching Time, 2 V Step
Switching Transient (Glitch)
POWER SUPPLIES
Supply Current
ADV3200
ADV3201
DVCC
Supply Voltage Range
Test Conditions/Comments
Sync-tip clamp enabled,
VIN = VCLAMP + 0.1 V
Sync-tip clamp enabled,
VIN = VCLAMP − 0.1 V
Sync-tip clamp disabled
50% update to 1% settling
50% update to 1% settling
IN00 to IN31, RTI
Min
1
0.1
−2.9
−10
VPOS or VNEG, outputs enabled, no load
VPOS or VNEG, outputs disabled
VPOS or VNEG, outputs enabled, no load
VPOS or VNEG, outputs disabled
VPOS − VNEG
PSR
ADV3200
ADV3201
OPERATING TEMPERATURE RANGE
Temperature Range
θJA
VNEG, VPOS, f = 1 MHz
Operating (still air)
Operating (still air)
Typ Max Unit
3 pF
4 MΩ
3 12 μA
−1
−0.25
mA
−3 μA
50 ns
40 ns
300 mV p-p
250
120
260
130
2.5
5 ± 10% to
6.6 ± 10%
−50
−45
−40 to +85
16
300
155
310
165
3.5
mA
mA
mA
mA
mA
V
dB
dB
°C
°C/W
OSD ENABLED
VS = ±2.5 V (ADV3200), VS = ±3.3 V (ADV3201) at TA = 25°C, G = +1 (ADV3200), G = +2 (ADV3201), RL = 150 Ω, all configurations,
unless otherwise noted.
Table 2.
Parameter
Test Conditions/Comments
Min
Typ
Max Unit
OSD DYNAMIC PERFORMANCE
−3 dB Bandwidth
ADV3200
200 mV p-p
170 MHz
2 V p-p
135 MHz
ADV3201
200 mV p-p
150 MHz
2 V p-p
130 MHz
Gain Flatness
0.1 dB, 200 mV p-p
35 MHz
0.1 dB, 2 V p-p
35 MHz
Settling Time
1%, 2 V step
6 ns
Slew Rate
2 V step, peak
400 V/μs
OSD NOISE/DISTORTION PERFORMANCE
Differential Gain Error
NTSC or PAL
ADV3200
0.12 %
ADV3201
0.35 %
Differential Phase Error
NTSC or PAL
ADV3200
0.06 Degrees
ADV3201
0.04 Degrees
Input Voltage Noise
0.5 MHz to 50 MHz
ADV3200
27 nV/√Hz
ADV3201
25 nV/√Hz
Rev. 0 | Page 4 of 36

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ADV3200 전자부품, 판매, 대치품
www.DataSheet4U.com
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter
Analog Supply Voltage
(VPOS − VNEG)
Digital Supply Voltage
(DVCC − DGND)
Ground Potential Difference
(VNEG − DGND)
Maximum Potential Difference
DVCC − VNEG
Disabled Outputs
ADV3200 (|VOSD − VOUT|)
ADV3201
(|VOSD − (VOUT + VREF)/2|)
|VCLAMP − VINxx|
VREF Input Voltage
ADV3200
ADV3201
Analog Input Voltage
Digital Input Voltage
Output Voltage
(Disabled Analog Output)
Output Short-Circuit Duration
Output Short-Circuit Current
Storage Temperature Range
Operating Temperature Range
Lead Temperature
(Soldering 10 sec)
Junction Temperature
Rating
7.5 V
6V
+0.5 V to −4 V
9.4 V
<3 V
<3 V
6V
VPOS − 3.5 V to VNEG + 3.5 V
VPOS − 4 V to VNEG + 4 V
VNEG to VPOS
DVCC
(VPOS − 1 V) to (VNEG + 1 V)
Momentary
45 mA
−65°C to +125°C
−40°C to +85°C
300°C
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 6. Thermal Resistance
Package Type
176-Lead LQFP_EP
θJA Unit
16 °C/W
ADV3200/ADV3201
POWER DISSIPATION
The ADV3200/ADV3201 are operated with ±2.5 V, 5 V, or
±3.3 V supplies and can drive loads down to 150 Ω, resulting in
a large range of possible power dissipations. For this reason,
extra care must be taken to derate the operating conditions
based on ambient temperature.
The ADV3200/ADV3201 are packaged in a 176-lead exposed
pad LQFP. The junction-to-ambient thermal impedance (θJA) of
the ADV3200/ADV3201 is 16°C/W. For long-term reliability,
the maximum allowed junction temperature of the die should
not exceed 150°C. Temporarily exceeding this limit may cause a
shift in parametric performance due to a change in stresses
exerted on the die by the package. Exceeding a junction
temperature of 175°C for an extended period can result in
device failure. Figure 4 shows the range of allowed internal die
power dissipations that meet these conditions over the −40°C to
+85°C ambient temperature range. When using Figure 4, do not
include external load power in the maximum power calculation,
but do include load current dropped on the die output
transistors.
9
TJ = 150°C
8
7
6
5
4
3
15 25 35 45 55 65 75 85
AMBIENT TEMPERATURE (°C)
Figure 4. Maximum Die Power Dissipation vs. Ambient Temperature
ESD CAUTION
Rev. 0 | Page 7 of 36

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