|
|
PDF AK8851 Data sheet ( Hoja de datos )
| Número de pieza | AK8851 | |
| Descripción | NTSC/PAL/SECAM Digital Video Decoder | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AK8851 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
www.DaAtaSSAhHeeItK4UA.ScoEmI
Preliminary
[AK8851]
AK8851
NTSC/PAL/SECAM Digital Video Decoder
General Description
The AK8851 is an integrated chip that decodes NTSC, PAL, SECAM composite and S Video signals..
The digital output of the AK8851 is in Y, Cb, Cr signal format which compliances with ITU-R BT.601 and ITU-R BT.656*
specifications.
An internally generated pixel clock is synchronized with an input signal. The clock rate is 27 MHz.
When Closed Caption, VBID or WSS information are encoded on input Video signal, they are externally accessible.
Features
• NTSC-M, NTSC-4.43/PAL-B, D, G, H, I, N, Nc, M, 60/SECAM Composite signals and S Video signal decoding function
• On-chip dual 10 Bit ADCs (27 MHz operation)
• Built-in PLLs for input-signal-synchronized clock generation (Line-locked PLL and Frame-locked PLL)
• On-chip Programmable Gain Amp (PGA), ranging from 0 dB to 12 dB
• Auto Color Control (ACC)
• Auto Gain Control (AGC)
• Automatic input signal distinction function
• Adaptive 3-/5-line (NTSC/PAL) YC Separation
• Phase compensation function for PAL signal decoding
• ITU-R BT.656 format output (4:2:2 8 Bit parallel output with EAV / SAV)/ 16-Bit output is also available
• NTSC Closed Caption signal decoding function
• VBID (CGM-A) Program condition decoding function (CRCC decode)
• WSS Program condition decoding function
• VBI slicer function
• Macrovision Certification
• Power down function
• 6 – channel Analog inputs
• I2C Control
• 3.3 V +/- 10 % CMOS
• 100 Pin LQFP package
Note: * ITU-R BT.656 spec compatibility requires appropriate input signal quality.
MS0244-E-03
1
Confidential
2005 / 07
1 page  
ASAHI KASEI
56 DVSS
www.DataShe5e7t4U.comDVDD
58 HALFCKO
59 CLK27MO
60 DVDD
61 DVSS
62 DVSS
63 DVDD
64 NC
65 NC
66 DVSS
67 DVSS
68 DVDD
69 CLK
70 DVDD
71 DVSS
72 SDA
73 SELA
74 SCL
75 NC
76 DVSS
77 CLKINV
78 /RESET
79 /PD
80 EXTCLP
81 AVSS
82 AVDD
83 AVSS
84 AVSS
85 AVSS
86 AVSS
87 AVSS
88 VREFOUT
89 AVDD
90 IREFR1
91 IREFR2
92 AVSS
93 AVSS
94 AVDD
95 CLPCAP1
96 AIN1
97 AVSS
98 AIN2
99 AVSS
100 AIN3
G Ground pin for Digital
P Digital supply voltage (3.3V)
O
Indicator for Y Data and Cb/Cr Data in 8-bit output mode
(Indicator transition rate is 13.5MHz)
O 27MHz Clock output
P Digital supply voltage (3.3V)
G Ground pin for Digital
G Ground pin for Digital
P Digital supply voltage (3.3V)
[AK8851]
G Ground pin for Digital
G Ground pin for Digital
P Digital supply voltage (3.3V)
I Clock input pin (24.576MHz)
P Digital supply voltage (3.3V)
G Ground pin for Digital
I/O I2C bus Data
I I2C bus address select
I I2C bus clock
G Ground pin for Digital
I CLK27MO output polarization is determined by this pin
I
Reset signal input pin (Low Active)
Reset sequence needs 24.576MHz Clock
Power down control pin.
L: Power down
I H: Active
Reset sequence is necessary when Power Down signal after High
All output pins become Low while Power down pin is Low.
Monitor pin for internal clamp timing pulse.
I/O External clamp timing pulse can be input on this pin by setting a register
Open this pin when not using
G Ground pin for Analog
P Analog supply voltage (3.3V)
G Ground pin for Analog
G Ground pin for Analog
G Ground pin for Analog
G Ground pin for Analog
G Ground pin for Analog
O
Internal Vref Output pin
Connect ceramic capacitor (0.1uF -) between Analog Ground
G Analog supply voltage (3.3V)
O Connect 12kΩ(1%) Register between Analog ground
O Connect 4.7kΩ(1%) Register between Analog ground
G Ground pin for Analog
G Ground pin for Analog
P Analog supply voltage (3.3V)
O
Capacitor for clamp.
Connect 0.1uF ceramic capacitor between AVSS
I
Analog Video Signal Input pin.
Input –6dB analog video signal via 0.1uF capacitor.
G Ground pin for Analog
I
Analog Video Signal Input pin.
Input –6dB analog video signal via 0.1uF capacitor.
G Ground pin for Analog
I
Analog Video Signal Input pin.
Input –6dB analog video signal via 0.1uF capacitor
AVDD
P Analog supply voltage (3.3V)
AVSS
G Ground pin for Analog
DVDD
P Digital supply voltage (3.3V)
DVSS
G Ground pin for Digital
* Recommendation: Perform a “power on reset” prior to using the device, as applying voltage to the AK8851 cannot ensure
proper device initialization. Only a reset sequence can ensure this.
MS0244-E-03
5
Confidential
2005 / 07
5 Page 
ASAHI KASEI
[AK8851]
www.Da(t5a)S/hPeDet4pUin.croemlease reset
Before setting /PD pin to Low, at least 100 clock cycles must be applied to the device..
After releasing /PD pin to high, the /RESET pin must be kept low until the analog reference voltage and current are
stabilized.
CLK
/R E S E T
/PD
sRES
hRES
VIL
VIH
Parameter
Symbol
Min.
Typ.
Max.
Units
Remark
Set /PD RESET width
sRES
100
CLK Clock Rising Edge
Release /PD Reset width
hRES
10
msec
Note) a 24.576 MHz clock is required for reset operation.
After application of clock, the /RESET pin should be pulled low. This power-on RESET is recommended whenever power is
applied or removed from the AK8851, as applying voltage to the AK8851 cannot ensure proper device initialization. Only a
reset sequence can ensure this.
until.
Output pins except for CLK27MO pin become low during the reset sequence.
(6) Power-On-Reset
At power-on, /RESET pin must be kept low until the analog reference voltage and current are stabilized.
DVDD
AV D D
3.0V
/RESET
pRES_PON
VIL
Parameter
Symbol
Min.
Typ.
Max.
Units
Remark
/RESET pulse width
pRES_PON
10
msec
Note) For reset operation, a 24.576 MHz clock is required.
System control pins ( SELA,CLKINV,/PD ) must be kept valid until the 10-clock time after the rising edge of reset
pulse.
Output pins except for CLK27MO pin become low during the reset sequence.
MS0244-E-03
11
Confidential
2005 / 07
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AK8851.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AK8850 | NTSC Digital Video Decoder | Asahi Kasei Microsystems |
| AK8851 | NTSC/PAL/SECAM Digital Video Decoder | Asahi Kasei Microsystems |
| AK8855 | NTSC/PAL Digital Video Decoder | Asahi Kasei Microsystems |
| AK8856 | NTSC/PAL Digital Video Decoder |  AKM |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |