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AD7191 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 AD7191은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 AD7191 기능
기능 Sigma-Delta ADC
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AD7191 데이터시트, 핀배열, 회로
Pin-Programmable, Ultralow Noise, 24-Bit,
Sigma-Delta ADC for Bridge Sensors
AD7191
FEATURES
GENERAL DESCRIPTION
Pin-programmable output rate
Output data rate: 10 Hz, 50 Hz, 60 Hz, 120 Hz
Pin-programmable PGA
Gain: 1, 8, 64, 128
Pin-programmable power-down and reset
RMS noise: 15 nV @ 10 Hz (gain = 128)
Up to 21.5 noise free bits (gain = 1)
Internal or external clock
Bridge power-down switch
Offset drift: 5 nV/°C
Gain drift: 1 ppm/°C
Specified drift over time
Simultaneous 50 Hz/60 Hz rejection
Internal temperature sensor
Power supply: 3 V to 5.25 V
Current: 4.35 mA
Temperature range: –40°C to +105°C
Package: 24-lead TSSOP
INTERFACE
2-wire serial
SPI, QSPI™, and MICROWIRE™ compatible
Schmitt trigger on SCLK
The AD7191 is a low noise, complete analog front end for high
precision measurement applications. It contains a low noise,
24-bit sigma-delta (Σ-Δ) ADC. The on-chip low noise gain
stage means that signals of small amplitude can be interfaced
directly to the ADC. It contains two differential analog inputs.
The part also includes a temperature sensor that can be used for
temperature compensation.
For ease-of-use, all the features of the AD7191 are controlled by
dedicated pins. The on-chip PGA has a gain of 1, 8, 64, or 128,
supporting a full-scale differential input of ±5 V, ±625 mV,
±78 mV, or ±39 mV. The output data rate can be programmed
to 10 Hz, 50 Hz, 60 Hz, or 120 Hz. Simultaneous 50 Hz and 60 Hz
rejection is obtained when the output data rate is set to 10 Hz
or 50 Hz; 60 Hz only rejection is obtained when the output data
rate is set to 60 Hz. The AD7191 can be operated with the
internal clock, or an external clock can be used.
The part operates with a power supply of 3 V to 5.25 V. It
consumes a current of 4.35 mA. It is available in a 24-lead
TSSOP package.
APPLICATIONS
Weigh scales
Strain gauge transducers
www.DPatraeSshsueeret4mU.ecaosmurement
Medical and scientific instrumentation
AVDD
FUNCTIONAL BLOCK DIAGRAM
AGND DVDD DGND REFIN(+) REFIN(–)
AIN1
AIN2
AIN3
AIN4
AD7191
MUX
PGA
Σ-Δ
ADC
SERIAL
INTERFACE
AND CONTROL
LOGIC
DOUT/RDY
SCLK
PDOWN
CHAN
CLKSEL
BPDSW
TEMPERATURE
SENSOR
CLOCK
CIRCUITRY
PGA2
PGA1
MCLK1 MCLK2
Figure 1.
ODR2 ODR1 TEMP
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.




AD7191 pdf, 반도체, 판매, 대치품
AD7191
Parameter1
Analog Input Current
Input Current2
Input Current Drift
REFERENCE INPUT
REFIN Voltage
Reference Voltage Range2
Absolute REFIN Voltage Limits2
Average Reference Input Current
Average Reference Input Current
Drift
Normal-Mode Rejection2
Common-Mode Rejection
TEMPERATURE SENSOR
Accuracy
Sensitivity
BRIDGE POWER-DOWN SWITCH
RON
Allowable Current2
INTERNAL/EXTERNAL CLOCK
Internal Clock
Frequency
Duty Cycle
External Clock/Crystal
Frequency
Input Low Voltage, VINL
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Input High Voltage, VINH
Input Current
LOGIC INPUTS
Input High Voltage, VINH2
Input Low Voltage, VINL2
Hysteresis2
Input Currents
LOGIC OUTPUT (DOUT/RDY)
Output High Voltage, VOH 2
Output Low Voltage, VOL2
Output High Voltage, VOH2
Output Low Voltage, VOL2
AD7191B
±2
±3
±5
AVDD
1
AVDD
AGND – 50 mV
AVDD + 50 mV
4.5
±0.03
±1.3
Same as for analog
inputs
100
+2
2815
10
30
4.92 + 4%
50:50
4.9152
2.4576/5.12
0.8
0.4
2.5
3.5
±10
2
0.8
0.1/0.25
±10
DVDD 0.6
0.4
4
0.4
Unit
nA max
nA max
pA/°C typ
V nom
V min
V max
V min
V max
μA/V typ
nA/V/°C typ
nA/V/°C typ
dB typ
°C typ
Codes/°C typ
Ω max
mA max
Test Conditions/Comments
Gain = 1
Gain > 1
REFIN = REFIN(+) REFIN().
The differential input must be limited to
±(AVDD − 1.25 V)/gain when gain > 1.
External clock.
Internal clock.
Applies after user calibration at one temperature.
Continuous current.
MHz min/MHz max
% typ
MHz nom
MHz min/MHz max
V max
V max
V min
V min
μA max
DVDD = 5 V.
DVDD = 3 V.
DVDD = 3 V.
DVDD = 5 V.
MCLKIN = DVDD or DGND.
V min
V max
V min/V max
μA max
VIN = DVDD or DGND.
V min
V max
V min
V max
DVDD = 3 V, ISOURCE = 100 μA.
DVDD = 3 V, ISINK = 100 μA.
DVDD = 5 V, ISOURCE = 200 μA.
DVDD = 5 V, ISINK = 1.6 mA.
Rev. A | Page 4 of 20

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AD7191 전자부품, 판매, 대치품
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
AVDD to AGND
DVDD to DGND
AGND to DGND
Analog Input Voltage to AGND
Reference Input Voltage to AGND
Digital Input Voltage to DGND
Digital Output Voltage to DGND
AIN/Digital Input Current
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature
TSSOP
θJA Thermal Impedance
θJC Thermal Impedance
Lead Temperature, Soldering
Reflow
Rating
0.3 V to +6.5 V
0.3 V to +6.5 V
−0.3 V to +0.3 V
0.3 V to AVDD + 0.3 V
0.3 V to AVDD + 0.3 V
0.3 V to DVDD + 0.3 V
0.3 V to DVDD + 0.3 V
10 mA
40°C to +105°C
65°C to +150°C
150°C
128°C/W
42°C/W
260°C
AD7191
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
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Rev. A | Page 7 of 20

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