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L24C32 데이터시트 PDF




Sigma에서 제조한 전자 부품 L24C32은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 L24C32 기능
기능 (L24C32 / L24C64) Two Wire Serial EEPROM
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L24C32 데이터시트, 핀배열, 회로
Sigma Microelectronics Co., Ltd
www.DataSheet4U.com
SPECIFICATION
L24C32/L24C64
Version 1.0
Sigma reserves the right to change this documentation without prior notice.
Features




L24C32 pdf, 반도체, 판매, 대치품
L24C32/L24C64
Pin Descriptions
32K bits (4096 X 8) / 64K bits (8192 X 8)
DEVICE/PAGE ADDRESSES (A2, A1 and A0): The A2, A1 and A0 pins are device address inputs
that are hard wired for the L24C32/L24C64. Eight 32K/64K devices may be addressed on a single bus
system (device addressing is discussed in detail under the Device Addressing section).
SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain
driven and may be wire-ORed with any number of other open-drain or open- collector devices.
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM
device and negative edge clock data out of each device.
WRITE PROTECT (WP): The L24C32/L24C64 has a Write Protect pin that provides hardware data
protection. The Write Protect pin allows normal read/write operations when connected to ground
(GND). When the Write Protect pin is connected
to VCC, the write protection feature is enabled and operates as shown in the following Table 2.
Table 2: Write Protect
WP Pin Status
At VCC
At GND
L24C32
Full (32K) Array
Part of the Array Protected
Normal Read/Write Operations
L24C64
Full (64K) Array
Memory Organization
L24C32, 32K SERIAL EEPROM: Internally organized with 128 pages of 32 bytes each, the 32K
requires an 12-bit data word address for random word addressing.
L24C64, 64K SERIAL EEPROM: Internally organized with 256 pages of 32 bytes each, the 64K
requires a 13-bit data word address for random word address
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Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device.
Data on the SDA pin may change only during SCL low time periods (see to Figure 1 on page 5). Data
changes during SCL high periods will indicate a start or stop condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which
must precede any other command (see to Figure 2 on page 5).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a
read sequence, the stop command will place the EEPROM in a standby power mode (see Figure 2 on
page 5).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM
in 8-bit words. The EEPROM sends a "0" to acknowledge that it has received each word. This
happens during the ninth clock cycle.
STANDBY MODE: The L24C32/L24C64 features a low-power standby mode which is enabled:
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L24C32 전자부품, 판매, 대치품
L24C32/L24C64
32K bits (4096 X 8) / 64K bits (8192 X 8)
CURRENT ADDRESS READ: The internal data word address counter maintains the last address
accessed during the last read or write operation, incremented by one. This address stays valid between
operations as long as the chip power is maintained. The address "roll over" during read is from the last
byte of the last memory page to the first byte of the first page. The address "roll over" during write is
from the last byte of the current page to the first byte of the same page.
Once the device address with the read/write select bit set to "1" is clocked in and acknowledged by the
EEPROM, the current address data word is serially clocked out. The microcontroller does not respond
with an input "0" but does generate a following stop condition (see Figure 7 on page 8).
RANDOM READ: A random read requires a "dummy" byte write sequence to load in the data word
address. Once the device address word and data word address are clocked in and acknowledged by the
EEPROM, the microcontroller must generate another start condition. The microcontroller now
initiates a current address read by sending a device address with the read/write select bit high. The
EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller
does not respond with a "0" but does generate a following stop condition (see Figure 8 on page 8).
SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a random
address read. After the microcontroller receives a data word, it responds with an acknowledge. As
long as the EEPROM receives an acknowledge, it will continue to increment the data word address
and serially clock out sequential data words. When the memory address limit is reached, the data word
address will "roll over" and the sequential read will continue. The sequential read operation is
terminated when the microcontroller does not respond with a "0" but does generate a following stop
condition (see Figure 9 on page 9).
Figure 4: Device Address
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Figure 5: Byte Write
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부품번호상세설명 및 기능제조사
L24C32

(L24C32 / L24C64) Two Wire Serial EEPROM

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L24C32A

32K bits EEPROM

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