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PDF WV3HG264M72EER-PD4 Data sheet ( Hoja de datos )
| Número de pieza | WV3HG264M72EER-PD4 | |
| Descripción | 1GB - 2x64Mx72 DDR2 SDRAM REGISTERED | |
| Fabricantes | White Electronic Designs | |
| Logotipo |  |
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White Electronic Designs WV3HG264M72EER-PD4
ADVANCED*
1GB – 2x64Mx72 DDR2 SDRAM REGISTERED, SO-DIMM, w/PLL
FEATURES
Registered 200-pin (SO-DIMM), Small-Outline dual
in-line memory module
Support ECC detection and correction
Fast data transfer rates: PC2-6400*, PC2-5300*,
PC2-4200 and PC2-3200
VCC = VCCQ = 1.8V ±0.1V
VCCSPD = 1.7V to 3.6V
JEDEC standard 1.8V I/O (SSTL_18-compatible)
Differential data strobe (DQS, DQS#) option
Four-bit prefetch architecture
Multiple internal device banks for concurrent
operation
Differential clock inputs (CK, CK#)
Programmable CAS# latency (CL): 3, 4, 5*, and 6*
Posted CAS# additive latency: 0, 1, 2, 3 and 4
On-die termination (ODT)
7.8µs average periodic refresh interval
Serial Presence Detect (SPD) with EEPROM
Utilizes 512Mb DDR2 SDRAM components
Auto & self refresh (64ms: 8,192 cycle refresh)
wwwG.DoaltdaSehdegeet4cUo.ncotamcts
Dual Rank
RoHS compliant
JEDEC proposed Pin-out
Package
• 200 Pin SO-DIMM: 30.00mm (1.181") TYP.
DESCRIPTION
The WV3HG264M72EER is a 2x64Mx72 Double Data
Rate DDR2 SDRAM high density module. This memory
module consists of eighteen 64Mx8 bit DDR2 Synchronous
DRAMs in FBGA packages, mounted on a 200-pin SO-
DIMM FR4 substrate.
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
NOTE: Consult factory for availability of:
• Vendor source control options
• Industrial temperature option
Clock Speed
CL-tRCD-tRP
* Consult factory for availability
PC2-3200
200MHz
3-3-3
OPERATING FREQUENCIES
PC2-4200
266MHz
4-4-4
PC2-5300*
333MHz
5-5-5
PC2-6400*
400MHz
6-6-6
April 2006
Rev. 2
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
1 page  
White Electronic Designs WV3HG264M72EER-PD4
ADVANCED
Parameter
Input High (Logic 1) Voltage
Input High (Logic 0) Voltage
INPUT DC LOGIC LEVEL
All voltages referenced to VSS
Symbol
VIH(DC)
VIL(DC)
Min
VREF + 0.125
-0.300
Max
VCC + 0.300
VREF - 0.125
Unit
V
V
Parameter
AC Input High (Logic 1) Voltage
DDR2-400 & DDR2-533
AC Input High (Logic 1) Voltage
DDR2-667
AC Input High (Logic 0) Voltage
DDR2-400 & DDR2-533
AC Input High (Logic 0) Voltage
DDR2-667
INPUT AC LOGIC LEVEL
All voltages referenced to VSS
Symbol
Min
VIH(AC)
VREF + 0.250
VIH(AC)
VREF + 0.200
VIL(AC)
-
VIL(AC)
-
Max
-
-
VREF - 0.250
VREF - 0.200
Parameter
Input capacitance (A0~A13, BA0~BA1,
RAS#, CAS#, WE#)
Input capacitance (CKE0, CKE1),
(ODT0, ODT1)
wwInwpu.Dt caatpaaScihtaenecet4(UCS.c0o#m- CS1#)
Input capacitance (CK, CK#)
Input capacitance (DM0~DM8),
(DQS0~DQS8)
Input capacitance (DQ0~DQ63),
(CB0~CB7)
INPUT/OUTPUT CAPACITANCE
TA=25°C, f=100MHz
Symbol
Min
CIN1 11
CIN2
CIN3
CIN4
CIN5 (665)
CIN5 (534, 403)
COUT1 (665)
COUT1 (534, 403)
11
11
10
9
9
9
9
Max
12
12
12
11
11
12
11
12
Unit
V
V
V
V
Unit
pF
pF
pF
pF
pF
pF
pF
pF
April 2006
Rev. 2
5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
5 Page 
White Electronic Designs WV3HG264M72EER-PD4
ADVANCED
Document Title
1GB – 2x64Mx72 DDR2 SDRAM REGISTERED, w/PLL, SO-DIMM
DRAM DIE OPTIONS:
• SAMSUNG: C-Die, will move to E-Die Q2'06
• MICRON: U37Y: B-Die
Revision History
Rev #
Rev 0
Rev 1
History
Created
1.0 Update DC specification
1.1 Added "P" for JEDEC proposed pin-out
1.2 Added die rev info
Release Date Status
March 2006
Concept
April 2006
Advanced
Rev 2
2.1 Added VCCSPD voltage specification
April 2006
Advanced
www.DataSheet4U.com
April 2006
Rev. 2
11 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet WV3HG264M72EER-PD4.PDF ] | |
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