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QS532805 데이터시트 PDF




Integrated Device Technology에서 제조한 전자 부품 QS532805은 전자 산업 및 응용 분야에서
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부품번호 QS532805 기능
기능 GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER
제조업체 Integrated Device Technology
로고 Integrated Device Technology 로고


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QS532805 데이터시트, 핀배열, 회로
QS532805/A/B
GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER
GUARANTEED LOW SKEW
3.3V CMOS CLOCK
DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
QS532805/A/B
FEATURES:
JEDEC compatible LVTTL level inputs and outputs
10 output, low skew clock signal buffer
Monitor output
Clock inputs are 5V tolerant
Pinout and function compatible with QS5805T
25on-chip resistors for low noise
Input hysteresis for better noise margin
Guaranteed low skew:
0.7ns output skew
0.7ns pulse skew
1ns part-to-part skew
Std., A, and B speed grades (B speed in QSOP package only)
Available in QSOP and SOIC packages
DESCRIPTION
The QS532805 clock buffer/driver circuits can be used for clock buffering
schemes where low skew is a key parameter. This device offers two banks
of 5 non-inverting outputs. The QS532805 incorporates 25series
termination resistors. This clock buffer product is designed for use in high
performance workstations, embedded and personal computing systems
using 3V to 3.6V supply voltages. Several can be used in parallel or
scattered throughout a system for guaranteed low skew, system-wide clock
distribution networks. The QS532805 can accept 5V input and control
signals.
The QS532805 is characterized for operation at -40°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
www.DataSheet4U.com
OEA
INA
INB
OEB
5
OA5 OA1
MON
5
OB5 OB1
NOTE: QS532805 has a 25series termination resistor on each clock output, including monitor.
INDUSTRIAL TEMPERATURE RANGE
c 1999 Integrated Device Technology, Inc.
1
JULY 2000
DSC-5785/-




QS532805 pdf, 반도체, 판매, 대치품
QS532805/A/B
GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER
INDUSTRIALTEMPERATURERANGE
SKEW CHARACTERISTICS OVER OPERATING RANGE
TA = -40°C to +85°C, VCC = 3.3V ± 0.3V
CLOAD = 50pF (no resistor)
QS532805
Symbol
Parameter (1)
Min. Max.
tSK(01) Skew between all outputs, same transition, same bank
— 0.7
QS532805A
Min. Max.
— 0.7
QS532805B (3)
Min. Max.
— 0.7
tSK(02) Skew between two outputs, same transition, different banks
— 0.9 — 0.9 — 0.9
tSK(P) Pulse Skew; skew between opposite transitions of the same output (tPHL - tPLH) — 1 — 0.7 — 0.5
tSK(T) Part-to-part skew (2)
— 1.5 —
1 —1
NOTES:
1. This parameter is guaranteed but not production tested. Skew parameters apply to propagation delays only.
2. tSK(T) only applies to devices of the same transition, part type, temperature, power supply voltage, loading package, and speed grade.
3. The B speed grade is only available in the QSOP package.
Unit
ns
ns
ns
ns
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
TA = -40°C to +85°C, VCC = 3.3V ± 0.3V
CLOAD = 50pF (no resistor)
QS532805
QS532805A
QS532805B (4)
Symbol
tPLH
tPHL
tR
Propagation Delay
Parameter (1,2)
Output Rise Time, 0.8V to 2V (3)
Min. Max. Min. Max. Min. Max. Unit
1.5 6.5 1.5 5.8 1.5 5.2 ns
— 2 — 2 — 2 ns
tF Output Fall Time, 2V to 0.8V (3)
— 2 — 2 — 2 ns
tPZL Output Enable Time
tPZH
tPLZ Output Disable Time
tPZH
1.5 8 1.5 8 1.5 6.5 ns
1.5 7 1.5 7 1.5 6 ns
NOTES:
1. Minimums guaranteed but not production tested.
ww2w. .TDhaetapSrhoepeatg4aUti.ocnomdelay other range indicated by Min. and Max. specifications results from process and environmental variables. These propagation
delays do not imply limit skew.
3. This parameter is guaranteed but not production tested.
4. The B speed grade is only available in the QSOP package.
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