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Número de pieza | QS532807 | |
Descripción | GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER | |
Fabricantes | Integrated Device Technology | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de QS532807 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
No Preview Available ! QS532807
3.3V GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
GUARANTEED LOW SKEW
CMOS CLOCK
DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
QS532807
FEATURES:
− JEDEC compatible LVTTL level
− 10 low skew clock outputs
− Clock input is 5V tolerant
− Pinout and function compatible with QS5807
− 25Ω on-chip resistors available for low noise
− Input hysteresis for better noise margin
− Guaranteed low skew:
• 0.35ns output skew (same bank)
• 0.6ns output skew (different bank)
• 0.75ns part-to-part skew
− Available in QSOP and SOIC packages
DESCRIPTION:
The QS532807 clock driver/buffer circuit can be used for clock
buffering schemes where low skew is a key parameter. The QS532807
offers ten non-inverting outputs. Designed in IDT's proprietary QCMOS
process, these devices provide low propagation delay buffering with on-
chip skew of 0.35ns for same-transition, same bank signals. The
QS532807 has on-chip series termination resistors for lower noise clock
signals. The QS532807 series resistor version is recommended for
driving unterminated lines with capacitive loading and other noise
sensitive clock distribution circuits. These clock buffer products are
designed for use in high-performance workstations, embedded and
personal computing systems. Several devices can be used in parallel
or scattered throughout a system for guaranteed low skew, system-wide
clock distribution networks.
FUNCTIONAL BLOCK DIAGRAM
www.DataSheet4U.com
IN
INDUSTRIAL TEMPERATURE RANGE
c 1999 Integrated Device Technology, Inc.
1
O1
O2
O3
O4
O5
O6
O7
O8
O9
O 10
SEPTEMBER 2000
DSC - 5848
1 page QS532807
3.3V GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
TEST CIRCUITS AND WAVEFORMS
P u ls e
Generator
V IN
50Ω
VCC
DUT
VOUT
50pF
INDUSTRIAL TEMPERATURE RANGE
IN P U T
OUTPUT
Pulse generator for all pulses: f ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
PROPAGATION DELAY
PULSE SKEW — tSK(P)
tP L H
tR
tPH L
tF
3V
1.5V
0V
VOH
2V
1.5V
0.8V
VOL
INPU T
OUTPUT
tPLH
tPH L
tSK(p) = tPHL - tPLHL
3V
1.5V
0V
VOH
1.5V
VOL
OUTPUT SKEW — tSK(O1)
IN P U T
tP LH 1
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OUTPUT 2
tSK (01)
tPHL1
tSK(0 1)
tP LH 2
tP HL 2
tSK(01) = tPLH2 - tPLH1 or tPHL2 - tPHL1
3V
1.5V
0V
VOH
1.5V
VOL
VOH
1.5V
VOL
INPU T
PART 1 OUTPUT
PART 2 OUTPUT
PART-TO-PART SKEW — tSK(T)
tP LH 1
tP HL 1
tSK(t)
tSK(t)
tP LH 2
tP HL 2
tSK(t) = tPLH2 - tPLH1 or tPHL2 - tPHL1
3V
1.5V
0V
VOH
1.5V
VOL
VOH
1.5V
VOL
5
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet QS532807.PDF ] |
Número de pieza | Descripción | Fabricantes |
QS532805 | GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER | Integrated Device Technology |
QS532805A | GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER | Integrated Device Technology |
QS532805B | GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER | Integrated Device Technology |
QS532806 | Guaranteed Low Skew 3.3V CMOS Clock Driver/buffer | Integrated Device Technology |
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