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ADP1043A 데이터시트 PDF




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부품번호 ADP1043A 기능
기능 Digital Controller
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ADP1043A 데이터시트, 핀배열, 회로
FEATURES
Integrates all typical controller functions
Digital control loop
Remote and local voltage sense
Primary and secondary side current sense
PWM control
Synchronous rectifier control
Current sharing
Integrated programmable loop filter
I2C interface
Extensive fault detection and protection
Extensive programming
Fast calibration
EEPROM
Standalone or microcontroller control
APPLICATIONS
AC-to-DC power supplies
Isolated dc-to-dc power supplies
Redundant power supplies
Parallel power supplies
Server, storage, network, and communications infrastructure
Digital Controller for Isolated
Power Supply Applications
ADP1043A
GENERAL DESCRIPTION
The ADP1043A is a secondary side power supply controller IC
designed to provide all the functions that are typically needed in
an ac-to-dc or isolated dc-to-dc control application.
The ADP1043A is optimized for minimal component count,
maximum flexibility, and minimum design time. Features
include remote voltage sense, local voltage sense, primary and
secondary side current sense, pulse-width modulation (PWM)
generation, and hot-swap sense and control. The control loop is
digital with an integrated programmable digital filter. Protection
features include current limiting, ac sense, undervoltage lockout
(UVLO), and overvoltage protection (OVP).
The built-in EEPROM provides extensive programming of the
integrated loop filter, PWM signal timing, inrush current, and
soft start timing and sequencing. Reliability is improved through
a built-in checksum and redundancy of critical circuits.
A comprehensive GUI is provided for easy design of loop filter
characteristics and programming of the safety features. The
industry-standard I2C bus provides access to the many moni-
toring and system test functions.
The ADP1043A is available in a 32-lead LFCSP and operates
from a single 3.3 V supply.
PFC
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AC
INPUT
DRIVER
TYPICAL APPLICATION CIRCUIT
ADuM1410
DRIVER
DRIVER
SR1 SR2 ACSNS
CS1
PGND CS2– CS2+
VS1 GATE VS2
VS3+
OUTA
OUTB
OUTC
OUTD
OUTAUX
RES ADD RTD VCORE FLAGIN PSON PGOOD2 PGOOD1 SDA SCL
VS3–
SHAREo
SHAREi
VDD DGND AGND
VDD
Figure 1.
MICROCONTROLLER
LOAD
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.




ADP1043A pdf, 반도체, 판매, 대치품
ADP1043A
The ADP1043A is a secondary side controller for switch mode
power supplies (SMPS). It is designed for use in isolated redun-
dant applications. The ADP1043A integrates the typical functions
that are needed to control a power supply. These include
Output voltage sense and feedback
Digital loop filter compensation
PWM generation
Current sharing
Current, voltage, and temperature sense
OrFET control
Housekeeping and I2C interface
Calibration and trimming
The main function of controlling the output voltage is performed
using the feedback ADCs, the digital loop filter, and the PWM
block. The feedback ADCs use a multipath approach (patent
pending). The ADP1043A combines a high speed, low resolution
(fast and coarse) ADC and a low speed, high resolution (slow and
accurate) ADC. Loop compensation is implemented using the
digital filter. This PID (proportional, integral, derivative) filter is
implemented in the digital domain to allow easy programming
of filter characteristics, which is of great value in customizing
and debugging designs.
The PWM block generates up to seven programmable PWM
outputs for control of FET drivers and synchronous rectification
FET drivers. This programmability allows many traditional and
unique switching topologies to be realized.
A current share bus interface provides for parallel power supplies.
The part also has hot-swap OrFET sense and control for N + 1
redundant power supplies.
Conventional power supply housekeeping features, such as remote
and local voltage sense and primary and secondary side current
sense, are included. An extensive set of protections is offered,
including overvoltage protection (OVP), overcurrent protection
(OCP), overtemperature protection (OTP), undervoltage protec-
tion (UVP), ground continuity monitoring, and ac sense.
All these features are programmable through the I2C bus inter-
face. This bus interface is also used to calibrate the power supply.
Other information, such as input current, output current, and
fault flags, is also available through the I2C bus interface.
The internal EEPROM can store all programmed values and
allows standalone control without a microcontroller. A free,
downloadable GUI is available that provides all the necessary
software to program the ADP1043A. For more information
about the GUI, contact Analog Devices, Inc., for the latest
software and a user guide.
The ADP1043A operates from a single 3.3 V supply and is
specified from −40°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
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CS1
SR1
SR2
OUTA
OUTB
OUTC
OUTD
OUTAUX
VDD
VCORE
RES
AGND
VREF
ADC
ADC
ADC
ADC
PWM
ENGINE
UVLO
LDO
DIGITAL
CORE
8kB
EEPROM
I2C
INTERFACE
ADC
OSC
ADC
PWM
ADD
RTD
Figure 2.
Rev. 0 | Page 4 of 72
VS3+
VS3–
SHAREo
SHAREi
PGOOD1
PGOOD2
FLAGIN
DGND
PSON
SCL
SDA

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ADP1043A 전자부품, 판매, 대치품
ADP1043A
Parameter
OTP Threshold Accuracy
Symbol Test Conditions/Comments
When RTD = 10 kΩ
When RTD = 100 kΩ
OTP Speed
OTP Threshold Hysteresis
PGOOD1, PGOOD2, SHAREo PINS
(OPEN DRAIN)
Output Low Voltage
PSON, FLAGIN, SHAREi PINS
(DIGITAL INPUTS)
Input Low Voltage
Input High Voltage
SDA/SCL PINS
Input Low Voltage
Input High Voltage
Output Low Voltage
Leakage Current
SERIAL BUS TIMING
Clock Frequency
Glitch Immunity
Bus-Free Time
Start Setup Time
Start Hold Time
SCL Low Time
SCL High Time
SCL, SDA Rise Time
SCL, SDA Fall Time
Data Setup Time
Data Hold Time
EEPROM RELIABILITY
Endurance1
www.DataDSahteaeRt4eUte.cnotimon2
VOL
VIL
VIH
VIL
VIH
VOL
tSW
tBUF
tSU;STA
tHD;STA
tLOW
tHIGH
tR
tF
tSU;DAT
tHD;DAT
When RTD = 10 kΩ
VDD = 3.3 V
TJ = 85°C
Min
−0.5
−7.75
−5
−77.5
Typ
10
16
Max
+0.5
+7.75
+5
+77.5
Unit
% FSR
mV
% FSR
mV
ms
mV
0.4 V
VDD − 0.8
VDD − 0.8
−5
100
4.7
4.7
4
4.7
4
250
300
10,000
20
0.4
0.4
0.4
+5
400
50
1000
300
V
V
V
V
V
μA
kHz
ns
μs
μs
μs
μs
μs
ns
ns
ns
ns
Cycles
Years
1 Endurance is qualified as per JEDEC Standard 22, Method A117, and is measured at −40°C, +25°C, +85°C, and +125°C.
2 Retention lifetime equivalent at junction temperature (TJ) = 85°C as per JEDEC Standard 22, Method A117. Retention lifetime derates with junction temperature.
Rev. 0 | Page 7 of 72

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