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STD7N52K3 데이터시트 PDF




STMicroelectronics에서 제조한 전자 부품 STD7N52K3은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 STD7N52K3 자료 제공

부품번호 STD7N52K3 기능
기능 N-channel Power MOSFET
제조업체 STMicroelectronics
로고 STMicroelectronics 로고


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STD7N52K3 데이터시트, 핀배열, 회로
STB7N52K3 - STD7N52K3
STF7N52K3 - STP7N52K3
N-channel 525 V, 0.84 , 6.3 A, D2PAK, DPAK, TO-220FP, TO-220
SuperMESH3™ Power MOSFET
Preliminary Data
Features
Type
VDSS
RDS(on)
max
ID
Pw
STB7N52K3
STD7N52K3
STF7N52K3
STP7N52K3
525 V
525 V
525 V
525 V
< 0.98 6.3 A 90 W
< 0.98 6.3 A 90 W
< 0.98 6.3 A(1) 25 W
< 0.98 6.3 A 90 W
1. Limited by package
100% avalanche tested
Extremely high dv/dt capability
Gate charge minimized
Very low intrinsic capacitances
Improved diode reverse recovery
characteristics
Zener-protected
Application
Switching applications
www.DataSDheeets4Uc.croimption
The new SuperMESH3™ series is obtained
through the combination of a further fine tuning of
ST's well established strip-based PowerMESH™
layout with a new optimization of the vertical
structure. In addition to reducing on-resistance
significantly versus previous generation, special
attention has been taken to ensure a very good
dv/dt capability and higher margin in breakdown
voltage for the most demanding application.
Table 1. Device summary
Order codes
Marking
STB7N52K3
STD7N52K3
STF7N52K3
STP7N52K3
7N52K3
7N52K3
7N52K3
7N52K3
3
1
D²PAK
3
1
DPAK
3
2
1
TO-220
3
2
1
TO-220FP
Figure 1. Internal schematic diagram
Package
D²PAK
DPAK
TO-220FP
TO-220
Packaging
Tape and reel
Tape and reel
Tube
Tube
July 2008
Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
1/15
www.st.com
15




STD7N52K3 pdf, 반도체, 판매, 대치품
Electrical characteristics
STB7N52K3 - STD7N52K3 - STF7N52K3 - STP7N52K3
2 Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 5.
Symbol
On /off states
Parameter
Test conditions
V(BR)DSS
Drain-source
breakdown voltage
ID = 1 mA, VGS = 0
IDSS
IGSS
VGS(th)
RDS(on
Zero gate voltage
VDS = Max rating
drain current (VGS = 0) VDS = Max rating, TC=125 °C
Gate-body leakage
current (VDS = 0)
VGS = ± 20 V
Gate threshold voltage VDS = VGS, ID = 50 µA
Static drain-source on
resistance
VGS = 10 V, ID = 3.1 A
Min. Typ. Max. Unit
525 V
1 µA
50 µA
± 10 µA
3 3.75 4.5 V
0.84 0.98
Table 6.
Symbol
Dynamic
Parameter
Test conditions
Min. Typ. Max. Unit
gfs (1)
Forward
transconductance
VDS = 15 V, ID = 3.1 A
TBD
S
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 50 V, f = 1 MHz, VGS = 0
TBD
TBD
TBD
pF
pF
pF
COSS
(1)
eq
Equivalent output
capacitance
VGS = 0, VDS = 0 to 420 V
TBD
pF
www.DataSheet4U.com
RG
Intrinsic gate
resistance
f = 1 MHz open drain
TBD
Qg Total gate charge
VDD = 420 V, ID = 6.3 A,
Qgs Gate-source charge VGS = 10 V
Qgd Gate-drain charge
(see Figure 3)
TBD
TBD
TBD
nC
nC
nC
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
Table 7.
Symbol
Switching times
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Test conditions
VDD = 262 V, ID = 3.1 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 2)
Min.
Typ.
TBD
TBD
TBD
TBD
Max Unit
ns
ns
ns
ns
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STD7N52K3 전자부품, 판매, 대치품
STB7N52K3 - STD7N52K3 - STF7N52K3 - STP7N52K3
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
www.DataSheet4U.com
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STD7N52K3

N-channel Power MOSFET

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