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PDF LY622568 Data sheet ( Hoja de datos )
| Número de pieza | LY622568 | |
| Descripción | 256K X 8 BIT LOW POWER CMOS SRAM | |
| Fabricantes | Lyontek | |
| Logotipo |  |
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®
Rev. 2.2
LY622568
256K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Rev. 1.2
Rev. 2.0
Rev. 2.1
Rev. 2.2
Description
Initial Issue
Revised ISB1/IDR/Test Condition of ICC
Adding PKG type : 32 P-DIP
Revised Test Condition of ISB1/IDR
Adding SL Spec.
Revised ABSOLUTE MAXIMUN RATINGS
Added ISB1/IDR values when TA = 25℃ and TA = 40℃
Revised ISB1 (MAX) of SL grade
Revised FEATURES & ORDERING INFORMATION
Lead free and green package available to Green package
available
Added packing type in ORDERING INFORMATION
Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS
Revised -35ns to -45ns Spec.
Revised VDR
Issue Date
Aug.29.2005
Oct.31.2005
May.14.2007
Jul.26.2007
Mar.30.2009
Sep.11.2009
www.DataSheet4U.com
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
0
1 page  
®
Rev. 2.2
LY622568
256K X 8 BIT LOW POWER CMOS SRAM
CAPACITANCE (TA = 25℃, f = 1.0MHz)
PARAMETER
SYMBOL
MIN.
Input Capacitance
CIN -
Input/Output Capacitance
CI/O
-
Note : These parameters are guaranteed by device characterization, but not production tested.
MAX
6
8
UNIT
pF
pF
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to VCC - 0.2V
3ns
1.5V
CL = 30pF + 1TTL, IOH/IOL = -2mA/4mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
SYM.
tRC
tAA
tACE
tOE
tCLZ*
tOLZ*
tCHZ*
tOHZ*
tOH
LY622568-45
MIN. MAX.
45 -
- 45
- 45
- 25
10 -
5-
- 15
- 15
10 -
LY622568-55
MIN. MAX.
55 -
- 55
- 55
- 30
10 -
5-
- 20
- 20
10 -
LY622568-70
MIN. MAX.
70 -
- 70
- 70
- 35
10 -
5-
- 25
- 25
10 -
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
(2) WRITE CYCLE
www.DataSheet4U.comPARAMETER
SYM. LY622568-45 LY622568-55
MIN. MAX. MIN. MAX.
Write Cycle Time
tWC 45 - 55 -
Address Valid to End of Write tAW 40 - 50 -
Chip Enable to End of Write
tCW 40 - 50 -
Address Set-up Time
tAS 0 - 0 -
Write Pulse Width
tWP 35 - 45 -
Write Recovery Time
tWR 0 - 0 -
Data to Write Time Overlap
tDW 20 - 25 -
Data Hold from End of Write Time tDH
0-0-
Output Active from End of Write
tOW*
5
-
5-
Write to Output in High-Z
tWHZ* - 15 - 20
*These parameters are guaranteed by device characterization, but not production tested.
LY622568-70
MIN. MAX.
70 -
60 -
60 -
0-
55 -
0-
30 -
0-
5-
- 25
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
4
5 Page 
®
Rev. 2.2
LY622568
256K X 8 BIT LOW POWER CMOS SRAM
32 pin 450 mil SOP Package Outline Dimension
www.DataSheet4U.com
SYM. UNIT INCH.(BASE)
MM(REF)
A 0.118 (MAX) 2.997 (MAX)
A1 0.004(MIN) 0.102(MIN)
A2 0.111(MAX) 2.82(MAX)
b 0.016(TYP) 0.406(TYP)
c 0.008(TYP) 0.203(TYP)
D 0.817(MAX) 20.75(MAX)
E 0.445 ±0.005 11.303 ±0.127
E1 0.555 ±0.012 14.097 ±0.305
e 0.050(TYP) 1.270(TYP)
L 0.0347 ±0.008 0.881 ±0.203
L1 0.055 ±0.008 1.397 ±0.203
S 0.026(MAX) 0.660 (MAX)
y 0.004(MAX) 0.101(MAX)
Θ 0o -10o
0o -10o
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
10
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet LY622568.PDF ] | |
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