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UPD161602A 데이터시트 PDF




NEC에서 제조한 전자 부품 UPD161602A은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 UPD161602A 기능
기능 360/396-OUTPUT TFT-LCD SOURCE DRIVER
제조업체 NEC
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UPD161602A 데이터시트, 핀배열, 회로
DATA SHEET
MOS INTEGRATED CIRCUIT
µ PD161602A/B
360/396-OUTPUT TFT-LCD SOURCE DRIVER
(COMPATIBLE WITH 64-GRAY SCALES)
DESCRIPTION
The µ PD161602A/B is a source driver for TFT-LCDs supporting 64 gray-scale display and can operate with a
supply voltage of 2.5 V for the logic block and 5.0 V for the driver block. Data input as 6-bit x 3-dot digital data is
output as 64 γ -corrected values using an internal D/A converter and 5 external power modules, thus achieving a
260,000-color (full-color) display. In addition, the difference with A articles and B articles is only a difference in
γ compensation resistance.
FEATURES
CMOS level input
360/396 outputs
Input of 6 bits (gray-scale data) by 3 dots
Capable of outputting 64 values by means of 5 external power modules and a D/A converter
Output dynamic range: VSS2 to VDD2
High-speed data transfer: fCLK = 15 MHz MAX. (internal data transfer speed when operating at VDD1 = 2.5 V)
Level inversion γ -correction power supply is possible
Logic power supply voltage (VDD1): 2.2 to 3.6 V
Driver power supply voltage (VDD2): 4.5 to 5.5 V
# ORDERING INFORMATION
Part Number
www.DataSheet4U.com
µ PD161602AP
µ PD161602BP
Package
Chip
Chip
Remark Purchasing the above chip entail the exchange of documents such as a separate memorandum or product
quality, so please contact one of our sales representatives.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. S15381EJ1V0DS00 (1st edition)
Date Published May 2002 NS CP (K)
Printed in Japan
The mark # shows major revised points.
©
2001




UPD161602A pdf, 반도체, 판매, 대치품
µPD161602A/B
No. Pad Name
1 S1
2 S2
3 S3
4 S4
5 S5
6 S6
7 S7
8 S8
9 S9
10 S10
11 S11
12 S12
13 S13
14 S14
15 S15
16 S16
17 S17
18 S18
19 S19
20 S20
21 S21
22 S22
23 S23
24 S24
25 S25
26 S26
27 S27
28 S28
29 S29
30 S30
31 S31
32 S32
33 S33
34 S34
35 S35
36 S36
37 S37
38 S38
39 S39
40 S40
41 S41
42 S42
43 S43
www.DataSh4e4etS4U44.com
45 S45
46 S46
47 S47
48 S48
49 S49
50 S50
51 S51
52 S52
53 S53
54 S54
55 S55
56 S56
57 S57
58 S58
X [µ m]
7900.0
7860.0
7820.0
7780.0
7740.0
7700.0
7660.0
7620.0
7580.0
7540.0
7500.0
7460.0
7420.0
7380.0
7340.0
7300.0
7260.0
7220.0
7180.0
7140.0
7100.0
7060.0
7020.0
6980.0
6940.0
6900.0
6860.0
6820.0
6780.0
6740.0
6700.0
6660.0
6620.0
6580.0
6540.0
6500.0
6460.0
6420.0
6380.0
6340.0
6300.0
6260.0
6220.0
6180.0
6140.0
6100.0
6060.0
6020.0
5980.0
5940.0
5900.0
5860.0
5820.0
5780.0
5740.0
5700.0
5660.0
5620.0
Y [µ m]
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
Table 2–1. Pad Layout (1/3)
No. Pad Name
59 S59
60 S60
61 S61
62 S62
63 S63
64 S64
65 S65
66 S66
67 S67
68 S68
69 S69
70 S70
71 S71
72 S72
73 S73
74 S74
75 S75
76 S76
77 S77
78 S78
79 S79
80 S80
81 S81
82 S82
83 S83
84 S84
85 S85
86 S86
87 S87
88 S88
89 S89
90 S90
91 S91
92 S92
93 S93
94 S94
95 S95
96 S96
97 S97
98 S98
99 S99
100 S100
101 S101
102 S102
103 S103
104 S104
105 S105
106 S106
107 S107
108 S108
109 S109
110 S110
111 S111
112 S112
113 S113
114 S114
115 S115
116 S116
X [µm]
5580.0
5540.0
5500.0
5460.0
5420.0
5380.0
5340.0
5300.0
5260.0
5220.0
5180.0
5140.0
5100.0
5060.0
5020.0
4980.0
4940.0
4900.0
4860.0
4820.0
4780.0
4740.0
4700.0
4660.0
4620.0
4580.0
4540.0
4500.0
4460.0
4420.0
4380.0
4340.0
4300.0
4260.0
4220.0
4180.0
4140.0
4100.0
4060.0
4020.0
3980.0
3940.0
3900.0
3860.0
3820.0
3780.0
3740.0
3700.0
3660.0
3620.0
3580.0
3540.0
3500.0
3460.0
3420.0
3380.0
3340.0
3300.0
Y [µ m]
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
No. Pad Name
117 S117
118 S118
119 S119
120 S120
121 S121
122 S122
123 S123
124 S124
125 S125
126 S126
127 S127
128 S128
129 S129
130 S130
131 S131
132 S132
133 S133
134 S134
135 S135
136 S136
137 S137
138 S138
139 S139
140 S140
141 S141
142 S142
143 S143
144 S144
145 S145
146 S146
147 S147
148 S148
149 S149
150 S150
151 S151
152 S152
153 S153
154 S154
155 S155
156 S156
157 S157
158 S158
159 S159
160 S160
161 S161
162 S162
163 S163
164 S164
165 S165
166 S166
167 S167
168 S168
169 S169
170 S170
171 S171
172 S172
173 S173
174 S174
X [µ m]
3260.0
3220.0
3180.0
3140.0
3100.0
3060.0
3020.0
2980.0
2940.0
2900.0
2860.0
2820.0
2780.0
2740.0
2700.0
2660.0
2620.0
2580.0
2540.0
2500.0
2460.0
2420.0
2380.0
2340.0
2300.0
2260.0
2220.0
2180.0
2140.0
2100.0
2060.0
2020.0
1980.0
1940.0
1900.0
1860.0
1820.0
1780.0
1740.0
1700.0
1660.0
1620.0
1580.0
1540.0
1500.0
1460.0
1420.0
1380.0
1340.0
1300.0
1260.0
1220.0
1180.0
1140.0
1100.0
1060.0
1020.0
980.0
Y [µm]
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
667.7
512.2
4 Data Sheet S15381EJ1V0DS

4페이지










UPD161602A 전자부품, 판매, 대치품
µPD161602A/B
# 3. PIN FUNCTIONS
(1/2)
Pin Symbol
Pin Name
Pad No. I/O
Description
S1 to S396 Driver output
D00 to D05
D10 to D15
D20 to D25
R,/L
Display data input
Shift direction
control input
STHR
STHL
CLK
Right shift start
pulse input/output
Left shift start
pulse input/output
Shift clock input
STB
Latch input
www.DataSheet4U.com
1 to 396 Output The D/A converted 64-gray-scale analog voltage is output.
Osel = L: S1 to S396
Osel = H: S19 to S378
477 to 472
471 to 466
442 to 437
Input
The display data is input with a width of 18 bits, viz., the gray scale data (6 bits) by 3
dots (1 pixels).
DX0: LSB, DX5: MSB
429 Input These refer to the shift direction control input.
The shift directions of the shift registers are as follows.
<When in Osel = L>
R,/L = L (left shift): STHL (input), S396 S1 STHR (output)
R,/L = H (right shift) : STHR (input), S1 S396 STHL (output)
<When in Osel = H>
R,/L = L (left shift): STHL (input), S378 S19 STHR (output)
R,/L = H (right shift) : STHR (input), S19 S378 STHL (output)
498 I/O These refer to the start pulse I/O pins when driver ICs are connected in cascade.
Fetching of display data starts when H is read at the rising edge of CLK.
410 I/O R,/L = H (right shift): STHR input, STHL output
R,/L = L (left shift): STHL input, STHR output
443 Input This pin is the shift clock input of the shift register.
Display data is captured into the data register at the rising edge.
Osel = L: The start pulse output enters high level at the rising edge of the 132 th clock
following the start pulse input, and becomes the start pulse of the next level
driver. The 133th clock of the first driver becomes the start pulse input of the
next driver
Osel = H: The start pulse output enters high level at the rising edge of the 120th clock
following the start pulse input, and becomes the start pulse of the next driver.
The 121th clock of the first driver becomes the start pulse input of the next
driver.
436 Input A timing signal that latches the contents of the data register. When an H level is read
at the rising edge of CLK, the contents of the data register are latched and transferred
to the D/A converter, and analog voltage corresponding to the display data is output.
Also, because the internal operation via CLK continues even after the STB latch, do
not stop CLK. The contents of the shift register are cleared at the rising edge of STB.
Following a 1-pulse input at startup, this IC will operate normally. Note that the output
switch is turned off at the rising edge of STB.
For the STB input timing, refer to Switching Characteristics Waveform.
POL
Polarity inversion 434
signal
Input
This pin inverts the output polarity. The polarity inversion signal data is captured at the
rising edge of STB. The γ -resistor is switched in accordance with the positive/negative
polarity.
POL = L: Negative polarity
POL = H: Positive polarity
INV
VCOM
Data inversion 465
COM amplitude
output
409
Input This pin inverts the input data. Input data in synchronization with the shift clock.
INV = L: Normal input
INV = H: Data inversion input
Output This pin inverts the signal input from the POL pin and outputs it following conversion to
the VDD2 potential at the rising edge of STB. When the VCOM output is not used, VCsel
must be fixed to L.
Data Sheet S15381EJ1V0DS
7

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관련 데이터시트

부품번호상세설명 및 기능제조사
UPD161602A

360/396-OUTPUT TFT-LCD SOURCE DRIVER

NEC
NEC
UPD161602B

360/396-OUTPUT TFT-LCD SOURCE DRIVER

NEC
NEC

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