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25X40 데이터시트 PDF




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25X40 데이터시트, 핀배열, 회로
W25X10, W25X20, W25X40, W25X80
1M-BIT, 2M-BIT, 4M-BIT AND 8M-BIT
SERIAL FLASH MEMORY WITH
4KB SECTORS AND DUAL OUTPUT SPI
www.DataSheet4U.com
Publication Release Date: September 22, 2006
- 1 - Preliminary - Revision I




25X40 pdf, 반도체, 판매, 대치품
W25X10, W25X20, W25X40, W25X80
1. GENERAL DESCRIPTION
The W25X10 (1M-bit), W25X20 (2M-bit), W25X40 (4M-bit) and W25X80 (8M-bit) Serial Flash
memories provide a storage solution for systems with limited space, pins and power. The 25X series
offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code
download applications as well as storing voice, text and data. The devices operate on a single 2.7V to
3.6V power supply with current consumption as low as 5mA active and 1µA for power-down. All
devices are offered in space-saving packages.
The W25X10/20/40/80 array is organized into 512/1024/2048/4096 programmable pages of 256-bytes
each. Up to 256 bytes can be programmed at a time using the Page Program instruction. Pages can
be erased in groups of 16 (sector erase), groups of 256 (block erase) or the entire chip (chip erase).
The W25X10/20/40/80 has 32/64/128/256 erasable sectors and 2/4/8/16 erasable blocks respectively.
The small 4KB sectors allow for greater flexibility in applications that require data and parameter
storage. (See figure 2.)
The W25X10/20/40/80 supports the standard Serial Peripheral Interface (SPI), and a high
performance dual output SPI using four pins: Serial Clock, Chip Select, Serial Data I/O and Serial
Data Out. SPI clock frequencies of up to 75MHz are supported allowing equivalent clock rates of
150MHz when using the Fast Read Dual Output instruction. These transfer rates are comparable to
those of 8 and 16-bit Parallel Flash memories.
A Hold pin, Write Protect pin and programmable write protect, with top or bottom array control
features, provide further control flexibility. Additionally, the device supports JEDEC standard
manufacturer and device identification.
2. FEATURES
Family of Serial Flash Memories
W25X10: 1M-bit / 128K-byte (131,072)
W25X20: 2M-bit / 256K-byte (262,144)
www.DataSheet4UW.co2m5X40: 4M-bit / 512K-byte (524,288)
W25X80: 8M-bit / 1M-byte (1,048,576)
– 256-bytes per programmable page
– Uniform 4K-byte Sectors / 64K-byte Blocks
SPI with Single or Dual Outputs
– Clock, Chip Select, Data I/O, Data Out
– Optional Hold function for SPI flexibility
Data Transfer up to 150M-bits / second
– Clock operation to 75MHz
– Fast Read Dual Output instruction
Auto-increment Read capability
Flexible Architecture with 4KB sectors
– Sector Erase (4K-bytes)
– Block Erase (64K-byte)
Page program up to 256 bytes <2ms
Up to 100,000 erase/write cycles
20-year retention
Low Power Consumption, Wide
Temperature Range
– Single 2.7 to 3.6V supply
– 5mA active current, 1µA Power-down (typ)
– -40° to +85°C operating range
Software and Hardware Write Protection
– Write-Protect all or portion of memory
– Enable/Disable protection with /WP pin
Top or bottom array protection
Space Efficient Packaging
– 8-pin SOIC 150-mil (W25X10/20/40)
– 8-pin SOIC 208-mil (W25X40/80)
– 8-pin PDIP 300-mil (W25X10/20/40/80)
– 8-pin WSON 6x5-mm (W25X10/20/40/80)
-4-

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25X40 전자부품, 판매, 대치품
W25X10, W25X20, W25X40, W25X80
7.1 Package Types
At the time this datasheet was published not all package types had been finalized. Contact Winbond
to confirm availability of these packages before designing to this specification. The W25X10, W25X20
and W25X40 are offered in an 8-pin plastic 150-mil width SOIC (package code SN) as shown in figure
1a. The W25X40 and W25X80 is offered in an 8-pin plastic 208-mil width SOIC (package code SS) as
shown in figure 1b. All parts will be offered in 6x5-mm WSON (package code ZP) and 300-mil DIP
(package code DA). Package diagrams and dimensions are illustrated at the end of this datasheet.
7.2 Chip Select (/CS)
The SPI Chip Select (/CS) pin enables and disables device operation. When /CS is high the device is
deselected and the Serial Data Output (DO) pin is at high impedance. When deselected, the devices
power consumption will be at standby levels unless an internal erase, program or status register cycle
is in progress. When /CS is brought low the device will be selected, power consumption will increase
to active levels and instructions can be written to and data read from the device. After power-up, /CS
must transition from high to low before a new instruction will be accepted. The /CS input must track
the VCC supply level at power-up (see “Write Protection” and figure 20). If needed a pull-up resister
on /CS can be used to accomplish this.
7.3 Serial Data Output (DO)
The SPI Serial Data Output (DO) pin provides a means for data and status to be serially read from
(shifted out of) the device. Data is shifted out on the falling edge of the Serial Clock (CLK) input pin.
7.4 Write Protect (/WP)
The Write Protect (/WP) pin can be used to prevent the Status Register from being written. Used in
conjunction with the Status Register’s Block Protect (BP2, BP1, and BP0) bits and Status Register
Protect (SRP) bits, a portion or the entire memory array can be hardware protected. The /WP pin is
active low.
www.DataShe7et.45U.comHOLD (/HOLD)
The /HOLD pin allows the device to be paused while it is actively selected. When /HOLD is brought
low, while /CS is low, the DO pin will be at high impedance and signals on the DIO and CLK pins will
be ignored (don’t care). When /HOLD is brought high, device operation can resume. The /HOLD
function can be useful when multiple devices are sharing the same SPI signals. (“See Hold function”)
7.6 Serial Clock (CLK)
The SPI Serial Clock Input (CLK) pin provides the timing for serial input and output operations. ("See
SPI "Operations")
7.7 Serial Data Input / Output (DIO)
The SPI Serial Data Input/Output (DIO) pin provides a means for instructions, addresses and data to
be serially written to (shifted into) the device. Data is latched on the rising edge of the Serial Clock
(CLK) input pin. The DIO pin is also used as an output when the Fast Read Dual Output instruction is
executed.
Publication Release Date: September 22, 2006
- 7 - Preliminary - Revision I

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