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PDF PM6652 Data sheet ( Hoja de datos )
| Número de pieza | PM6652 | |
| Descripción | Single-phase Switching DC-DC Controllers & Smart Regulators | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de PM6652 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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PM6652
Single phase controller for Intel® MVP 6.5
render voltage regulator, CPU and VR11 CPU
Features
■ 4.5 V to 28 V input voltage range
■ 0.3 V to 1.5 V output voltage range
■ IMVP6.5 GPU/CPU and VR11 CPU mode
selection
■ Very fast load transient response using
constant-on-time loop control
■ Remote voltage sensing
■ Programmable droop function
■ 7 bit dynamic voltage positioning (VID)
■ Programmable pwm frequency
■ Lossless current sense with inductor DCR
■ Accurate inductor current sense with rsense
■ Negative current limit
■ Boot diode embedded
■ Latched OVP, UVP and overtemperature
■ Pulse skipping when suspend state is selected
■ Output voltage ripple compensation
■ Soft start and soft end
■ Power good available
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■ Current monitor (IMON)
■ Thermal throttling
VFQFPN-32 5x5 mm
Description
The PM6652 is a single phase, step-down SMPS
controller with high precision 7 bit DAC. It has
been designed to supply the CPU and the
graphics core (render engine) of the Intel® mobile
platform, according with Intel MVP6.5
specifications.
The PM6652 can also be configured to supply the
7-bit family, VR11 compliant, ATOM® processors.
The controller, based on constant on-time (COT)
architecture, allows real-time dynamic switching
of the core operating voltages and frequencies,
working in both performance and suspend render
states.
An embedded integrator control loop
compensates the DC voltage error due to the
output ripple.
Applications
■ Intel mobile graphic core IMVP6.5
■ Intel mobile CPU IMVP6.5
■ Intel ATOM® VR11 based devices
■ Notebook, netbook and nettop computers
■ Handheld and PDAs
Table 1. Device summary
The high efficiency at light load, achieved with
pulse skipping working mode, and the extremely
low shutdown and quiescent adsorbed current,
make the PM6652 the ideal choice in battery
powered devices.
Order codes
Package
Packaging
PM6652
PM6652TR
VFQFPN-32 5 x 5 mm (exposed pad)
Tray
Tape and reel
December 2009
Doc ID 16867 Rev 1
1/46
www.st.com
46
1 page  
PM6652
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
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Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
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Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Typical application circuit - IMVP6.5 render core supply . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
PM6652 pin out (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
VCORE turn on and PGOOD rising - No load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
VCORE turn on- CPU IMVP6.5 mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
VCOREworking mode - DPRSLPVR asserted, no load . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
VCOREworking mode (0.9V) - DPRSLPVR asserted, no load. . . . . . . . . . . . . . . . . . . . . . 18
VCORE working mode (0.4V) - DPRSLPVR asserted, no load . . . . . . . . . . . . . . . . . . . . . 19
VCORE working mode - DPRSLPVR not asserted, no load. . . . . . . . . . . . . . . . . . . . . . . . 19
VCORE working mode - DPRSLPVR not asserted, 10A load . . . . . . . . . . . . . . . . . . . . . . 19
VCORE working mode (0.9V) - DPRSLPVR not asserted, no load . . . . . . . . . . . . . . . . . . 19
VCORE working mode (0.4V) - DPRSLPVR not asserted, no load . . . . . . . . . . . . . . . . . . 19
VID5 transition - entering and exiting suspend state (fast exit) . . . . . . . . . . . . . . . . . . . . . 19
VID5 transition - entering and exiting suspend state (slow exit) . . . . . . . . . . . . . . . . . . . . . 20
Droop function - 5A to 15A transient response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
VCORE VID step variation - VR11 mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
VCORE soft end - COREON pin deassertion and PGOOD transition . . . . . . . . . . . . . . . . 20
VCORE overvoltage (+200mV). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
VCORE undervoltage (-300mV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
VCORE efficiency (DPRSLPVR high and low) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
VCORE load regulation - droop function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Simplified block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
PM6652 integrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
PM6652 droop function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
GFX supply - VID step, skip mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
CPU IMVP6.5 - VID step, skip mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Precision resistor current sensing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Inductor's DCR current sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
τL > τC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
τL < τC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Thermal compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
IMVP6.5 GFX mode start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
IMPV6.5 CPU mode start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
VDAC soft-start voltage slew-rate vs capacitor value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Average current limit - recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Average current limit detected . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Current monitor with external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Voltage regulator thermal throttling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Valley current limit circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Valley current limit detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
VFQFPN 5x5x1.0 mm 32L pitch 0.50 mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . 44
Doc ID 16867 Rev 1
5/46
5 Page 
PM6652
4 Electrical characteristics
Electrical characteristics
TJ = 25 °C, VIN = +12 V, PVCC = +5 V if not otherwise specified.
Table 5. Electrical characteristics
Symbol
Parameter
Test condition
Min. Typ. Max. Unit
Supply section
ISVCC,QUIESCENT IC supply current
COREON=5V, DPRSLPVR=5V, FB
forced above the regulation point
ISVCC,SHDN
Operating current in
shutdown
COREON=SGND, TA=25 °C
SVCC undevoltage
Rising edge, controller disabled below
lockout upper threshold this level
VSVCC UVLO
SVCC undervoltage Falling edge, controller enabled above
lockout lower threshold this level
UVLO hysteresis
3.8
850
1
4.3 4.5
3.9
400
µA
µA
V
mV
ON-time
Ton
On-time duration
VCORE=1.5V
OSC=250mV 820 920 1020
OSC=500mV 410 470 530 ns
OSC=1V 210 248 280
OFF-time
TOFFMIN
Integrator
Minimum off time
250 400 ns
VCOMP
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Overvoltage clamp
Undervoltage clamp
Integrator offset
VOVCLAMP=VCOMP-VCSNS
VUVCLAMP=VCOMP-VCSNS
80
-140
-2.5 2.5
mV
mV
mV
Voltages and DAC
VDAC
VDAC
slew-rate
IleakVCC_GFXC
VBOOT
Internal DAC reference DAC codes from 0.8125V to 1.5000V -0.7%
voltage accuracy
DAC codes from 0.3000V to 0.8000V -10
0.7%
mV
10
VDAC output voltage
slew rate after VIDs
variation.
GFX mode selected, and DPRSLPVR
asserted, positive VDAC dV/dt only, or
VR11 mode selected.
GFX mode selected, and DPRSLPVR
deassert, or CPU mode selected.
10
5
12.5
6.25
mV/µs
mV/µs
VCORE voltage sense
leakage current
1 µA
Boot-up voltage
CPU or VR11 mode selected
1.100
V
Current sensing
Doc ID 16867 Rev 1
11/46
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PM6652.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
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