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R2J20604NP 데이터시트 PDF




Renesas Technology에서 제조한 전자 부품 R2J20604NP은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 R2J20604NP 기능
기능 Integrated Driver
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R2J20604NP 데이터시트, 핀배열, 회로
R2J20604NP
Integrated Driver – MOS FET (DrMOS)
REJ03G1605-0200
Rev.2.00
Jun 30, 2008
Description
The R2J20604NP multi-chip module incorporates a high-side MOS FET, low-side MOS FET, and MOS-FET driver in
a single QFN package. The on and off timing of the power MOS FET is optimized by the built-in driver, making this
device suitable for large-current buck converters. The chip also incorporates a high-side bootstrap Schottky barrier
diode (SBD), eliminating the need for an external SBD for this purpose.
Integrating a driver and both high-side and low-side power MOS FETs, the new device is also compliant with the
package standard “Integrated Driver – MOS FET (DrMOS)” proposed by Intel Corporation.
Features
Built-in power MOS FET suitable for applications with 12 V input and low output voltage
Built-in driver circuit which matches the power MOS FET
Built-in tri-state input function which can support a number of PWM controllers
Capable of 3.3 V PWM signal
VIN operating-voltage range: 16 V max
High-frequency operation (above 1 MHz) possible
Large average output current (Max. 40 A)
Achieve low power dissipation (About 4.4 W at 1 MHz, 25 A)
Controllable driver: Remote on/off
Built-in Schottky diode for bootstrapping
Low-side drive voltage can be independently set
Small package: QFN56 (8 mm × 8 mm × 0.95 mm)
Terminal Pb-free
Outline
www.DataSheet4U.com
VCIN BOOT
GH VIN
1 14
Reg5V
56 15
Driver
Tab
High-side MOS
Tab
DISBL#
PWM
MOS FET Driver
VSWH
43
Low-side MOS Tab
28
CGND VLDRV
GL PGND
42 29
(Bottom view)
QFN56 package 8 mm × 8 mm
REJ03G1605-0200 Rev.2.00 Jun 30, 2008
Page 1 of 14




R2J20604NP pdf, 반도체, 판매, 대치품
R2J20604NP
Absolute Maximum Ratings
Item
Symbol
Rating
Units
Power dissipation
Pt(25)
25 W
Pt(110)
8W
Average output current
Iout
40 A
Input voltage
VIN (DC)
–0.3 to +16
V
VIN (AC)
20
Supply voltage
VCIN (DC)
–0.3 to +16
V
VCIN (AC)
20
Low side driver voltage
VLDRV (DC)
–0.3 to +16
V
VLDRV (AC)
20
Switch node voltage
VSWH (DC) 16 V
VSWH (AC)
20
BOOT voltage
VBOOT (DC)
22
V
VBOOT (AC)
25
DISBL# voltage
Vdisble
–0.3 to VCIN
V
PWM voltage
Vpwm
–0.3 to +5.5
V
–0.3 to +0.3
V
Reg5V current
Ireg5V
–10 to +0.1
mA
Operating junction temperature
Tj-opr
–40 to +150
°C
Storage temperature
Tstg
–55 to +150
°C
Notes: 1. Pt(25) represents a PCB temperature of 25°C, and Pt(110) represents 110°C.
2. Rated voltages are relative to voltages on the CGND and PGND pins.
3. For rated current, (+) indicates inflow to the chip and (–) indicates outflow.
4. This rating is when UVL (Under Voltage Lock out) is ineffective (normal operation mode).
5. This rating is when UVL (Under Voltage Lock out) is effective (lock out mode).
6. The specification values indicated “AC” are limited within 100 ns.
(Ta = 25°C)
Note
1
1
2
2, 6
2
2, 6
2
2, 6
2
2, 6
2
2, 6
2
2, 4
2, 5
3
www.DataSheet4U.com
45
40
35
30
25
20
15
10
5
0
0
Safe Operating Area
Condition
VOUT = 1.3 V
VIN = 12 V
VLDRV = 5 V
VCIN = 12 V
L = 0.45 µH
fPWM = 1 MHz
20 40 60 80 100 120 140 160
PCB Temperature (°C)
REJ03G1605-0200 Rev.2.00 Jun 30, 2008
Page 4 of 14

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R2J20604NP 전자부품, 판매, 대치품
R2J20604NP
Test Circuit
VB
VLDRV
VCIN
A IIN
A ILDRV
A ICIN
5 V pulse
VCIN VLDRV BOOT
DISBL#
VIN
Reg5V
VSWH
R2J20604NP
PWM
PGND
CGND GH GL
Note: PIN = IIN × VIN + ILDRV × VLDRV + ICIN × VCIN
POUT = IO × VO
Efficiency = POUT / PIN
PLOSS(DrMOS) = PIN – POUT
Ta = 27°C
V VIN
Electric
load
IO
Averaging Average Output Voltage
circuit
V VO
www.DataSheet4U.com
REJ03G1605-0200 Rev.2.00 Jun 30, 2008
Page 7 of 14

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R2J20604NP

Integrated Driver

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