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PDF WCMA2008U1X Data sheet ( Hoja de datos )
| Número de pieza | WCMA2008U1X | |
| Descripción | 256K x 8 Static RAM | |
| Fabricantes | Weida Semiconductor | |
| Logotipo |  |
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A2008U1X
WCMA2008U1X
Features
• High Speed
— 70ns availability
• Voltage range
— 2.7V–3.6V
• Ultra low active power
— Typical active current: 1 mA @ f = 1MHz
— Typical active current: 7 mA @ f = fmax (70ns speed)
• Low standby power
• Easy memory expansion with CE1,CE2,and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
Functional Description
The WCMA2008U1X is a high-performance CMOS static
RAM organized as 256K words by 8 bits. This device features
advanced circuit design to provide ultra-low active current.
This is device is ideal for portable applications. The device also
has an automatic power-down feature that significantly reduc-
Logic Block Diagram
256K x 8 Static RAM
es power consumption by 80% when addresses are not tog-
gling. The device can be put into standby mode reducing pow-
er consumption by more than 99% when deselected (CE1
HIGH or CE2 LOW).
Writing to the device is accomplished by taking Chip Enable
(CE1) and Write Enable (WE) inputs LOW and Chip Enable 2
(CE2) HIGH. Data on the eight I/O pins (I/O0 through I/O7) is
then written into the location specified on the address pins (A0
through A17).
Reading from the device is accomplished by taking Chip En-
able (CE1) and Output Enable (OE) LOW while forcing Write
Enable (WE) and Chip Enable 2 (CE2) HIGH. Under these
conditions, the contents of the memory location specified by
the address pins will appear on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a
high-impedance state when the device is deselected (CE1
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or
during a write operation (CE1 LOW and CE2 HIGH and WE
LOW).
The WCMA2008U1X is available in a 36-ball FBGA package.
www.DataSheet4U.com
AAA021
AAAAAAAAA11516890347
CE2 CE1
WE
OE
Data in Drivers
128K x 8
ARRAY
COLUMN
DECODER
POWER
DOWN
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
1 page  
WCMA2008U1X
Switching Characteristics Over the Operating Range[5]
WCMA2008U1X-70
Parameter
Description
Min.
Max.
Unit
READ CYCLE
tRC Read Cycle Time
70 ns
tAA Address to Data Valid
70 ns
tOHA
Data Hold from Address Change
10
ns
tACE CE1 LOW and CE2 HIGH to Data Valid
70 ns
tDOE
tLZOE
tHZOE
tLZCE
tHZCE
OE LOW to Data Valid
OE LOW to Low Z[6]
OE HIGH to High Z[6, 7]
CE1 LOW and CE2 HIGH to Low Z[6]
CE1 HIGH or CE2 LOW to High Z[6, 7]
35 ns
5 ns
25 ns
10 ns
25 ns
tPU
CE1 LOW and CE2 HIGH to Power-Up
0
ns
tPD
WRITE CYCLE[8,]
CE1 HIGH or CE2 LOW to Power-Down
70 ns
tWC Write Cycle Time
70 ns
tSCE
CE1 LOW and CE2 HIGH to Write End
60
ns
tAW
Address Set-Up to Write End
60
ns
tHA
Address Hold from Write End
0
ns
tSA
Address Set-Up to Write Start
0
ns
tPWE
WE Pulse Width
50 ns
tSD
Data Set-Up to Write End
30
ns
tHD
Data Hold from Write End
0
ns
tHZWE
WE LOW to High Z[6, 7]
25 ns
tLZWE
WE HIGH to Low Z[6]
10 ns
www.DaNtaoStehse:et4U.com
5. Test conditions assume signal transition time of 5 ns or less, timing reference levels of VCC(typ.)/2, input pulse levels of 0 to VCC(typ.), and output loading
of the specified IOL/IOH and 30 pF load capacitance.
6. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.
7. tHZOE, tHZCE, and tHZWE transitions are measured when the outputs enter a high impedance state.
8. The internal write time of the memory is defined by the overlap of WE, CE1 = VIL, and CE2 = VIH. All signals must be ACTIVE to initiate a write and any
of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that
terminates the write.
5
5 Page 
Document Title: WCMA2008U1X, 256K x 8 Static RAM
REV. Spec #
ECN #
Issue Date
** 38-14021
115240
3/18/2002
WCMA2008U1X
Orig. of Change Description of Change
MGN
New Data Sheet
www.DataSheet4U.com
11
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| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet WCMA2008U1X.PDF ] | |
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