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PDF XR16C872 Data sheet ( Hoja de datos )
| Número de pieza | XR16C872 | |
| Descripción | DUAL UART | |
| Fabricantes | Exar Corporation | |
| Logotipo |  |
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XR16C872
DUAL UART WITH 1284 PARALLEL PORT
AND PLUG-AND-PLAY CONTROLLER
DESCRIPTION
August 2003
The XR16C8721 (872) is a dual universal asynchronous receiver and transmitter (UART) with a 1284 bi-directional
parallel port and ISA Bus Plug-and-Play (PnP) interface. The PnP interface supports auto configuration for desktop
and embedded PC computers. The host bus interface can also be configured to manually support standard PC
addresses COM1-4 and LPT1-2. The parallel port is compatible to IEEE 1284 specification and supports Compatible
Centronics, Extended Capability (ECP) and Enhanced Parallel Port (EPP) protocols. The UARTs are software
compatible to industry standard 16C550 and include enhanced features of 128 bytes of transmit and receive FIFOs,
programmable transmit and receive FIFO trigger levels, transmit and receive FIFO counters, IrDA (Infrared Data
Association) encoder/decoder, automatic RTS/CTS hardware flow control with selectable hysteresis and automatic
software (Xon/Xoff) flow control. On board status registers provide interrupt priorities, receive data errors and modem
status. Each channel has a programmable baud rate generator to provide data rates up to 460.8Kbps. The bi-
directional parallel port can be configured as a general purpose input/output interface or connected to a printer or
portable storage devices. The 872 operates on a single +5V and +3.3 power supply. It is available in a small 100-
pin QFP package and offers commercial and industrial temperature ranges. The chip is fabricated in an advanced
CMOS process to reduce power consumption.
FEATURES
• Plug and Play ISA Bus Specification Compliant
- Auto Configuration
- Direct Connection, Needing no External Buffers
- Resource Data in External 4K EEPROM
- Support 10-Interrupts, IRQ3-7, IRQ9-12, IRQ15
• Manual Configuration for standard COM1-COM-4
and LPT1-LPT2
• IEEE 1284 Compliant
www.DataShee-t4BUid.cioremctional Host Port
- Level II Electrical Interface, Needing no
External Transceivers
- Standard Centronics/ECP/EPP Mode
- 16-byte FIFO in ECP mode
APPLICATIONS
• Multi-function PC/ISA Bus Card with RS-232/
RS-422/RS-485 Interface and Printer/parallel Port
• Embedded Systems
• Dual UART Software Compatible with 16C550
• 128-byte of Transmit and Receive FIFOs to
Reduce CPU Bandwidth Requirement
• FIFO Counters in Transmitter and Receiver
• Automatic RTS/CTS Flow Control with Hysteresis
to Increase Data Throughput
• IrDA Infrared Pulse Shaping Encoder/decoder
for up to 115.2Kbps Data Rate
• Up to 460.8 Kbps Standard Serial Data Rate
• +5V and +3.3V Operation
• 100-pin Quad Flat Package (14x20mm)
• Reference PC ISA Card Design Available
• Windows2 95, 98 and NT4 Drivers Available
• Portable Infrared Wireless Systems
• High Speed Bidirectional Parallel Port
• High Speed Serial Ports
ORDERING INFORMATION
Part number
XR16C872CQ
XR16C872IQ
Package
100-Lead QFP
100-Lead QFP
Operating temperature
0° C to + 70° C
-40° C to + 85° C
Device Status
Discontinued. No replacement available.
Discontinued. No replacement available.
1Covered by U.S. patent number 5,649,122 and patent pending.
2Windows is a trademark of Microsoft Corp.
Rev. 1.00
Visit Exar Web Site at www.exar.com
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 • (510) 668-7000 • FAX (510) 668-7017
1 page  
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XR16C872
PIN DESCRIPTION
Signal Type Definition. The following signal type definitions are from the 872 device point of view.
I Standard input
O Standard active output
OT24
Tri-state output
IOP14 Tri-state bi-directional input/output
IO24
Tri-state bi-directional input/output
Name
Pin # Type
HOST INTERFACE
A0-A15
2-15
17,18
I
Pin Description
ISA Bus Address. All 16 bits are used during PnP auto configuration
sequence with external EEPROM providing the resource data. In the
manual configuration mode A0-A10 are used for decoding COM1-4 and
LPT1-2 addresses. After auto or manual configuration, bits A0-A2 select
UART internal registers and A3-A10 are used to select UART A or B, or
the 1284 printer port.
D0-D7
30-21
IO24
ISA Data Bus. These are the eight three state data lines for transferring
data to or from the controlling CPU. D0 is the least significant bit and the
first data bit in a transmit or receive serial data stream.
AEN
19 I Address Enable. Active high to validate A0-A15 address lines during Direct
Memory Access operation on the ISA bus. Connect to logic 0 when it is not used.
IOR#
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99 I Read Strobe. A logic 0 transition on this pin will request the contents of
an Internal register defined by address bits A0-A2 for either UART channels
A/B or A0-A1 for the printer port, be place onto D0-D7 data bus for a read
cycle by the CPU.
IOW#
100 I Write Strobe. A logic 1 transition on this pin will transfer the data on the
data bus (D0-D7), as defined by either address bits A0-A2 for UART channels
A/B or A0-A1 for the printer port, into an internal register during a write cycle
from the CPU.
IRQ15
IRQ12-10
IRQ9
IRQ3-7
86
87-89
97
92-96
OT24 Interrupt Request Lines. These are three state active high interrupt lines to
controlling CPU when an interrupt request is generated by the UART
channel A/B or 1284 printer port.
DREQ5
DREQ3
DREQ1
DREQ0
78 OT24 DMA Request Channel 0,1,3 and 5. These are three state active high
79 outputs with internal weak pull down resistor. DMA request is used
80 by the 1284 parallel port during ECP and FIFO mode.
81
DACK5#
DACK3#
DACK1#
DACK0#
82 I DMA Acknowledge Channel 0,1,3 and 5. These are active low inputs
83 and are used by the 1284 parallel port during ECP and FIFO mode.
84
85
Rev. 1.00
Visit Exar Web Site at www.exar.com
5
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XR16C872
To
CPU Bus
D0-D7
A0-A2
A8-A15
IOR#
IOW#
IOCHRDY
TC
IRQB
(UART-B)
IRQA
(UART-A)
IRQC
(1284)
GND
AEN#
IRQ3
IRQ4
IRQ7
www.DataSheet4U.com
DREQ
(1284 Port)
DACK#
(1284 Port)
DREQ3
DACK3#
VCC
Mapped with Address A8-A15:
* UART-A at 0x7F00-7F08 & IRQA
* UART-B at 0x5F00-6F08 & IRQB
* 1284 Port at 0x6F00-6F08 withIRQC,
DREQ and DACK#
MAN#
S1
S2
S3
S4
S5
GND
30-21
2-4
5-12
19
99
100
20
91
92
93
A0-A2
A3-A10
94
95
96
97 XR16C872
89
88
87
86
81
80
79
78
85
84
83
82
UART-A
UART-B
1284
Parallel
Port
74
18
17 Port
Configuration
16 Logic
15
14
Figure 4, Manual Configuration Interface in Embedded Application
Rev. 1.00
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| PDF Descargar | [ Datasheet XR16C872.PDF ] | |
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