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PDF 38N30 Data sheet ( Hoja de datos )
| Número de pieza | 38N30 | |
| Descripción | FQA38N30 | |
| Fabricantes | Fairchild Semiconductor | |
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FQA38N30
N-Channel QFET® MOSFET
300 V, 38.4 A, 85 mΩ
Features
• 38.4 A, 300 V, RDS(on) = 85 mΩ (Max.) @ VGS = 10 V, ID =
19.2 A
• Low Gate Charge (Typ. 90 nC)
• Low Crss (Typ. 70 pF)
• 100% Avalanche Tested
• RoHS compliant
August 2014
Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficiency switch mode power supply, power factor correction,
electronic lamp ballast based on half bridge.
D
G
DS
TO-3PN
Absolute Maximum Ratings TC = 25°C unless otherwise noted.
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering,
1/8" from Case for 5 Seconds
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
G
S
FQA38N30
300
38.4
24.3
153.6
± 30
1500
38.4
29
4.5
290
2.33
-55 to +150
300
Typ.
--
0.24
--
Max.
0.43
--
40
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Unit
°C/W
°C/W
°C/W
©2000 Fairchild Semiconductor Corporation
FQA38N30 Rev. C0
1
www.fairchildsemi.com
1 page  
Figure 12. Gate Charge Test Circuit & Waveform
Same Type
50KΩ as DUT
12V 200nF
300nF
VGS
10V
VGS
VDS
Qgs
IG = co3nmsAt.
DUT
Qg
Qgd
Charge
V10GVS
Figure 13. Resistive Switching Test Circuit & Waveforms
VDS
VGS
RG
RL
VDD
DUT
VDS
90%
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
V1G0GVSS
tp
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
VDS
ID
RG
L
EAS = --21-- L IAS2
------B--V--D--S-S-------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
DUT
VDD
VDS (t)
t p Time
©2000 Fairchild Semiconductor Corporation
FQA38N30 Rev. C0
5
www.fairchildsemi.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 38N30.PDF ] | |
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