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부품번호 | BD9897FS 기능 |
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기능 | DC-AC Inverter Control IC | ||
제조업체 | ROHM Semiconductor | ||
로고 | |||
전체 5 페이지수
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STRUCTURE
NAME OF PRODUCT
TYPE
FUNCTION
Silicon Monolithic Integrated Circuit
DC-AC Inverter Control IC
BD9897FS
・ 36V High voltage process
・ 1ch control with Full-Bridge
・ Lamp current and voltage sense feed back control
・ Sequencing easily achieved with Soft Start Control
・ Short circuit protection with Timer Latch
・ Under Voltage Lock Out
・ Mode-selectable the operating or stand-by mode by stand-by pin
・ Synchronous operating the other BD9897FS IC’s
・ BURST mode controlled by PWM and DC input
・ Output liner Control by external DC voltage
○Absolute Maximum Ratings(Ta = 25℃)
Parameter
Supply Voltage
BST pin
SW pin
BST-SW voltage difference
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature
Power Dissipation
Symbol
VCC
BST
SW
BST-SW
Topr
Tstg
Tjmax
Pd
Limits
36
40
36
7
-40~+85
-55~+150
+150
950*
Unit
V
V
V
V
℃
℃
℃
mW
*Pd derate at 7.6mW/℃ for temperature above Ta = 25℃ (When mounted on a PCB 70.0mm×70.0mm×1.6mm)
〇Operating condition
www.DataSheet4U.com
Parameter
Supply voltage
BST voltage
BST-SW voltage difference
CT oscillation frequency
BCT oscillation frequency
Symbol
VCC
BST
BST-SW
fCT
fBCT
Limits
7.5~30.0
4.0~36.0
4.0~6.5
60~180
0.05~1.00
Unit
V
V
V
kHz
kHz
Status of this document
The Japanese version of this document is the official specification.
Please use the translation version of this document as a reference to expedite understanding of the official version.
If these are any uncertainty in translation version of this document, official version takes priority.
REV. B
4/4
〇NOTE FOR USE
1. When designing the external circuit, including adequate margins for variation between external devices and
IC. Use adequate margins for steady state and transient characteristics.
2. The circuit functionality is guaranteed within of ambient temperature operation range as long as it is within
recommended operating range. The standard electrical characteristic values cannot be guaranteed at other
voltages in the operating ranges, however the variation will be small.
3. Mounting failures, such as misdirection or miscounts, may harm the device.
4. A strong electromagnetic field may cause the IC to malfunction.
5. The GND pin should be the location within ±0.3V compared with the PGND pin.
6. BD9897FS incorporate a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD
circuit) is designed only to shut the IC off to prevent runaway thermal operation. It is not designed to
protect the IC or guarantee its operation of the thermal shutdown circuit is assumed.
7. Absolute maximum ratings are those values that, if exceeded, may cause the life of a device to become
significantly shortened. Moreover, the exact failure mode caused by short or open is not defined. Physical
countermeasures, such as a fuse, need to be considered when using a device beyond its maximum ratings.
8. About the external FET, the parasitic Capacitor may cause the gate voltage to change, when the drain voltage
is switching. Make sure to leave adequate margin for this IC variation.
9. On operating Slow Start Control (SS is less than 2.2V), It does not operate Timer Latch.
10. By STB voltage, BD9897FS are changed to 2 states. Therefore, do not input STB pin voltage between one
state and the other state (0.8~2.0V).
11. The pin connected a connector need to connect to the resistor for electrical surge destruction.
This IC is a monolithic IC which (as shown is Fig-1) has P+ substrate and between the various pins. A
P-N junction is formed from this P layer of each pin. For example, the relation between each potential
is as follows,
○(When GND > PinB and GND > PinA, the P-N junction operates as a parasitic diode.)
○(When PinB > GND > PinA, the P-N junction operates as a parasitic transistor.)
Parasitic diodes can occur inevitably in the structure of the IC. The operation of parasitic diodes can result
in mutual interference among circuits as well as operation faults and physical damage. Accordingly you must
not use methods by which parasitic diodes operate, such as applying a voltage that is lower than the GND
(P substrate) voltage to an input pin.
12.This IC is a monolithic IC which (as shown is Fig-1)has P+ substrate and between the various pins. A P-N
junction is formed from this P layer of each pin. For example, the relation between each potential is
as follows,
○(When GND > PinB and GND > PinA, the P-N junction operates as a parasitic diode.)
○(When PinB > GND > PinA, the P-N junction operates as a parasitic transistor.)
Parasitic diodes can occur inevitably in the structure of the IC. The operation of parasitic diodes can result
www.DataSheet4iUn.cmoumtual interference among circuits as well as operation faults and physical damage. Accordingly you must
not use methods by which parasitic diodes operate, such as applying a voltage that is lower than the GND
(P substrate) voltage to an input pin.
(PinA)
Resistance
P+
N
P
N
P+
P substrate
GND
Parasitic diode
Transistor (NPN)
(PinB)
B
CC
E
N
GND
N
N
P substrate
GND
Parasitic diode
N
(PinB)
(PinA)
Parasitic diode
B BC C
EE
GND
GND
Other adjacent components Parasitic diode
Fig-1 Simplified structure of a Bipolar IC
REV. B
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부품번호 | 상세설명 및 기능 | 제조사 |
BD9897FS | DC-AC Inverter Control IC | ROHM Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |