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PDF ZABG4002 Data sheet ( Hoja de datos )
| Número de pieza | ZABG4002 | |
| Descripción | Advanced Low Power Four-Stage GaAs FET Bias IC | |
| Fabricantes | Diodes | |
| Logotipo |  |
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A Product Line of
Diodes Incorporated
ZABG4002
LOW POWER 4 STAGE FET LNA BIAS CONTROLLER
Summary
The ZABG4002 is a four stage depletion mode FET bias controller intended primarily for satellite Low Noise Block’s (LNB’s), but
its also suitable for other LNA applications such as those in found in PMR’s and microwave links. The ZABG4002 provides each
FET with an independent protected negative gate voltage and positive drain voltage with user programmable drain current.
Combining an advanced IC process and packaging techniques, the ZABG4002 helps minimise power consumption, component
cost and PCB area whilst enhancing overall reliability.
Features
• Four stage FET bias controller
• Operating range of 3.0V to 8.0V
• Low quiescent supply current, 1.2mA typical
• FET drain voltages set at 2.0V
• FET drain current selectable from 0 to 15mA
• Switchable FETs for power management
• Allows first and second stage FETs to be run at different
(optimum) drain currents
• FET drain voltages and currents held stable over
temperature and Vcc variations
• FETs protected against overstress during power-up and
power-down.
• Internal negative supply generator allowing single supply
operation (available for external use)
• Low external component count
Pin Assignments
D2
G2
VCC
GND
Top View
CSUB
G3
D4
G4
RCAL1
Applications
• Twin LNB’s
www.Da•taShQeeuta4dU.LcNomB’s
• US LNB’s
• Microwave links
• PMR and Cellular telephone systems
Bottom View
Single Universal LNB System Diagram
Gain stages
GaAs FET’s
Down
Converter
IF Switching, gain
and control
ZABG
46002
ZXHF
5002
ZABG4002
Document number: DS32047 Rev. 1 - 2
1 of 7
www.diodes.com
January 2010
© Diodes Incorporated
1 page  
Applications Circuit
L*
C*
JF1
L*
C*
C1
10nF
C2
10nF
* Stripline Elements
A Product Line of
Diodes Incorporated
ZABG4002
D2 G3
G2 D4
Vcc
ZABG4002
G4
Gnd Rcal1
Vcc
CNB
47nF
CSUB
47nF
RCAL2
39k
RCAL1
39k
Applications Information
Above is a partial applications circuit for the ZABG4002 showing all external components needed for biasing one of the four FET
stages available. Each bias stage is provided with a gate and drain pin. The drain pin provides a regulated 2.0V supply that
includes a drain current monitor. The drain current taken by the external FET is compared with a user selected level, generating a
signal that adjusts the gate voltage of the FET to obtain the required drain current. If for any reason, an attempt is made to draw
more than the user set drain current from the drain pin, the drain voltage will be reduced to ensure excess current is not taken.
The gate pin drivers are also current limited.
www.DaTtahSehebeiat4sUs.tcaogmes are split up into two pairs, with the drain current of each pair set by an external RCAL resistor. RCAL1 sets the drain
currents of stages 1 and 3, whilst RCAL2 sets the drain currents of stages 2 and 4. This allows the optimisation of drain currents for
differing tasks such as input stages where noise can be critical and later amplifier stages where gain may be more important. A
graph showing the relationship between the value of RCAL and ID is provided in the Typical Characteristics section of this
datasheet. The RCAL pins can also be used as logic inputs. If set to a logic high state (>3.0V), the associated FET bias stages are
disabled, driving gate pins to -2.5V and switching drain pins open-circuit. This feature can be used as part of a power
management system that turns off any unwanted stages in a multi input receiver.
The ZABG4002 includes a switched capacitor DC-DC converter that is used to generate the negative supply required to bias
depletion mode FETs used in common source circuit configuration as shown above. This converter uses two external capacitors,
CNB the charge transfer capacitor and CSUB the output reservoir capacitor. The circuit provides a regulated -2.5V supply both for
gate driver use and for external use if required (for extra discrete bias stages, mixer bias, local oscillator bias etc.). The -2.5V
supply is available from the CSUB pin.
If any bias stages are not required, their gate and drain pins may be left open circuit. If all bias stages associated with an RCAL
resistor are not required, then this resistor may be omitted.
To ease PCB layout, the pinout for the ZABG4002 includes two Vcc pins. These pins are internally connected so only one of the
pins needs to be powered for the device to function. It is probable that the extra pin will help avoid the need for trace cross-over
components or ground plane disruption from reverse side PCB links. Note that the exposed pad of the package must be either left
floating or connected to Csub.
ZABG4002
Document number: DS32047 Rev. 1 - 2
5 of 7
www.diodes.com
January 2010
© Diodes Incorporated
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet ZABG4002.PDF ] | |
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