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부품번호 | NB7HQ14M 기능 |
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기능 | 2.5V 7GHz / 10Gbps Differential Input to 1.8V / 2.5V 1:4 CML Clock / Data Fanout Buffer | ||
제조업체 | ON Semiconductor | ||
로고 | |||
전체 10 페이지수
NB7HQ14M
2.5V 7GHz / 10Gbps
Differential Input to 1.8V /
2.5V 1:4 CML Clock / Data
Fanout Buffer w/ Selectable
Input Equalizer
Multi−Level Inputs w/ Internal Termination
Description
The NB7HQ14M is a high performance differential 1:4 CML fanout
buffer with a selectable Equalizer receiver. When placed in series with
a Clock /Data path operating up to 7 GHz or 10 Gb/s, respectively, the
NB7HQ14M inputs will compensate the degraded signal transmitted
across a FR4 PCB backplane or cable interconnect and output four
identical CML copies of the input signal. Therefore, the serial data rate
is increased by reducing Inter−Symbol Interference (ISI) caused by
losses in copper interconnect or long cables. The EQualizer ENable
pin (EQEN) allows the IN/IN inputs to either flow through or bypass
the Equalizer section. Control of the Equalizer function is realized by
setting EQEN; When EQEN is set Low, the IN/IN inputs bypass the
Equalizer. When EQEN is set High, the IN/IN inputs flow through the
Equalizer. The default state at start−up is LOW. As such, NB7HQ14M
is ideal for SONET, GigE, Fiber Channel, Backplane and other
Clock/Data distribution applications.
The differential inputs incorporate internal 50 W termination
resistors that are accessed through the VT pin. This feature allows the
NB7HQ14M to accept various logic level standards, such as LVPECL,
CML or LVDS. The outputs have the flexibility of being powered by
either a 2.5 V or 1.8 V supply. The 1:4 fanout design was optimized
www.DatfaoSrhleoewt4Uou.ctopmut skew applications.
The NB7HQ14M is a member of the GigaComm™ family of high
performance clock products.
Features
• Input Data Rate > 10 Gb/s
• Input Clock Frequency > 7 GHz
• 150 ps Typical Propagation Delay
• 35 ps Typical Rise and Fall Times
• < 15 ps Maximum Output Skew
• < 0.8 ps Maximum RMS Clock Jitter
• < 10 ps pp of Data Dependent Jitter
• Differential CML Outputs, 400 mV Peak−to−Peak, Typical
• Selectable Input Equalization
• Operating Range: VCC = 2.375 V to 2.625 V, VCCO = 1.71 V to
2.625 V
• Internal Input Termination Resistors, 50 W
• −40°C to +85°C Ambient Operating Temperature
• These are Pb−Free Devices
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1
QFN−16
MN SUFFIX
CASE 485G
MARKING
DIAGRAM*
16
1
NB7H
Q14M
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
SIMPLIFIED BLOCK DIAGRAM
EQ
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2009
May, 2009 − Rev. 0
1
Publication Order Number:
NB7HQ14M/D
NB7HQ14M
Table 3. ATTRIBUTES
Characteristics
ESD Protection
Human Body Model
Machine Model
RPD − EQEN Input Pulldown Resistor
Moisture Sensitivity (Note 3)
16−QFN
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
3. For additional information, see Application Note AND8003/D.
Value
> 2 kV
> 200V
75 kW
Level 1
UL 94 V−0 @ 0.125 in
290
Table 4. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
VCCO
VIO
Positive Power Supply − Core
Positive Power Supply − Outputs
Positive Input/Output Voltage
GND = 0 V
GND = 0 V
GND = 0 V
3.0
3.0
−0.5 to VCC +
0.5
V
V
V
VINPP
IIN
IOUT
IVFREFAC
TA
Tstg
θJA
Differential Input Voltage |IN − IN|
Input Current Through RT (50 W Resistor)
Output Current Through RT (50 W Resistor)
VREFAC Sink/Source Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient) (Note 4)
16 QFN
0 lfpm
500 lfpm
16 QFN
16 QFN
1.89
$40
$40
$1.5
−40 to +85
−65 to +150
42
35
V
mA
mA
mA
°C
°C
°C/W
°C/W
θJC Thermal Resistance (Junction−to−Case) (Note 4)
16 QFN
4 °C/W
Tsol Wave Solder
Pb−Free
265 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
www.Datd4a.eSvhJiceEeeDtr4EeUlCia.cbsotilamitnyd. ard multilayer board − 2S2P (2 signal, 2 power) with 8 filled thermal vias under exposed pad.
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4
4페이지 NB7HQ14M
VCC
IN
50 W
VT
50 W
IN
Figure 4. Input Structure
IN
VIH
Vth
VIL
IN
Vth
Figure 5. Differential Input Driven
Single−Ended
VCC
Vthmax
Vth
Vthmin
GND
VIHmax
VILmax
VIH
IN Vth
VIL
VIHmin
VILmin
Figure 7. Vth Diagram
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VCC
VCMRmax
VIHD(MAX)
VILD(MAX)
VCMR
VIHD
VID = VIHD − VILD
VILD
VCMRmin
GND
VIHD(MIN)
VILD(MIN)
Figure 9. VCMR Diagram
IN
IN
Figure 6. Differential Inputs
Driven Differentially
IN VIHDVID = |VIHD(IN) − VILD(IN)|
IN VILD
Figure 8. Differential Inputs Driven Differentially
INx
INx
Q
Q
tPLH
VINPP = VIH(IN) − VIL(IN)
VOUTPP = VOH(Q) − VOL(Q)
tPHL
Figure 10. AC Reference Measurement
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7
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부품번호 | 상세설명 및 기능 | 제조사 |
NB7HQ14M | 2.5V 7GHz / 10Gbps Differential Input to 1.8V / 2.5V 1:4 CML Clock / Data Fanout Buffer | ON Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |