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PDF NB7L572 Data sheet ( Hoja de datos )
| Número de pieza | NB7L572 | |
| Descripción | 2.5 V / 3.3 V Differential 4:1 Mux Input To 1:2 LVPECL Clock/Data Fanout/Translator | |
| Fabricantes | ON Semiconductor | |
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NB7L572
2.5V / 3.3V Differential 4:1
Mux Input to 1:2 LVPECL
Clock/Data Fanout /
Translator
Multi−Level Inputs w/ Internal Termination
The NB7L572 is a high performance differential 4:1 Clock/Data
input multiplexer and a 1:2 LVPECL Clock/Data fanout buffer. The
INx/INx inputs includes internal 50 W termination resistors and will
accept differential LVPECL, CML, or LVDS logic levels. The
NB7L572 incorporates a pair of Select pins that will choose one of
four differential inputs and will produce two identical LVPECL output
copies of Clock or Data operating up to 7 GHz or 10 Gb/s,
respectively. As such, NB7L572 is ideal for SONET, GigE, Fiber
Channel, Backplane and other Clock/Data distribution applications.
The NB7L572 INx/INx inputs, outputs and core logic are powered
by a 2.5 V $5% V or 3.3 V $10% power supply. The two differential
LVPECL outputs will swing 750 mV when externally terminated with
a 50 W resistor to VCC – 2 V, and are optimized for low skew and
minimal jitter.
The NB7L572 is offered in a low profile 5x5 mm 32-pin QFN
Pb-free package. Application notes, models, and support
documentation are available at www.onsemi.com.
The NB7L572 is a member of the GigaComm™ family of high
performance clock products.
Features
• Input Data Rate > 10.7 Gb/s Typical
• Data Dependent Jitter < 15 ps
• Maximum Input Clock Frequency > 7 GHz Typical
• Random Clock Jitter < 0.8 ps RMS
• Low Skew 1:2 LVPECL Outputs, < 15 ps max
• 4:1 Multi−Level Mux Inputs, Accepts LVPECL, CML LVDS
• 150 ps Typical Propagation Delay
• 45 ps Typical Rise and Fall Times
• Differential LVPECL Outputs, 750 mV Peak-to-Peak, Typical
• Operating Range: VCC = 2.375 V to 3.6 V
• Internal 50 W Input Termination Resistors
• VREFAC Reference Output
• −40°C to +85°C Ambient Operating Temperature
• These are Pb−Free Devices
http://onsemi.com
1 32
QFN32
MN SUFFIX
CASE 488AM
MARKING
DIAGRAM*
32
1
NB7L
572
AWLYYWWG
A = Assembly Site
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
IN0
50W
VT0
50W
IN0
VREFAC0
IN1
VT15500WW
IN1
VREFAC1
IN2
50W
VT250W
IN2
VREFAC2
IN3
50W
VT3
IN350W
VREFAC3
SEL0
SEL1
0
1
2
3
Q0
Q0
Q1
Q1
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
June, 2012 − Rev. 2
1
Publication Order Number:
NB7L572/D
1 page  
NB7L572
Table 5. DC CHARACTERISTICS POSITIVE LVPECL OUTPUT VCC = 2.375 V to 3.6 V, GND = 0 V, TA = −40°C to +85°C
(Note 6)
Symbol
Characteristic
Min Typ Max Unit
POWER SUPPLY
VCC Power Supply Voltage
VCC = 2.5V
2.375
2.5
2.625
V
VCC = 3.3 V
3.0
3.3
3.6
ICC Power Supply Current for VCC (Inputs and Outputs Open)
90 110 mA
LVPECL OUTPUTS
VOH Output HIGH Voltage (Note 6)
VCC = 2.5 V
VCC = 3.3 V
VCC – 1145
1355
2155
VOL Output LOW Voltage (Note 6)
VCC = 2.5 V
VCC = 3.3 V
VCC – 2000
500
1300
DIFFERENTIAL CLOCK INPUTS DRIVEN SINGLE−ENDED (Figures 4 & 6) (Note 7)
VCC – 900
1600
2400
VCC – 1700
800
1600
VCC – 825
1675
2475
VCC – 1500
1000
1800
mV
mV
VIH
VIL
Vth
VISE
VREFAC
Single−Ended Input HIGH Voltage
Single−Ended Input LOW Voltage
Input Threshold Reference Voltage Range (Note 8)
Single−Ended Input Voltage (VIH – VIL)
Vth + 100
GND
1100
200
VCC
Vth – 100
VCC – 100
2400
mV
mV
mV
mV
VREF−AC Output Reference Voltage (100 mA Load)
DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Figures 5 & 7) (Note 9)
VCC – 1500 VCC – 1200 VCC – 1000 mV
VIHD
VILD
VID
VCMR
Differential Input HIGH Voltage (IN, IN)
Differential Input LOW Voltage (IN, IN)
Differential Input Voltage (IN, IN) (VIHD – VILD)
Input Common Mode Range (Differential Configuration, Note 10)
(Figure 8)
1200
0
100
800
VCC
VIHD – 100
1200
VCC – 50
mV
mV
mV
mV
IIH Input HIGH Current IN/IN (VT IN/VT IN Open)
IIL Input LOW Current IN/IN (VT IN/VT IN Open)
CONTROL INPUT (SELx Pin)
−150
−150
150 mA
150 mA
VIH Input HIGH Voltage for Control Pin
VIL Input LOW Voltage for Control Pin
IIH Input HIGH Current
IIL Input LOW Current
TERMINATION RESISTORS
2.0
GND
−215
VCC
0.8
V
V
40 mA
0 mA
RTIN
Internal Input Termination Resistor (Measured from INx to VTx)
45
50
55 W
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and Output parameters vary 1:1 with VCC.
6. LVPECL outputs loaded with 50 W to VCC − 2V for proper operation.
7. Vth, VIH, VIL,, and VISE parameters must be complied with simultaneously.
8. Vth is applied to the complementary input when operating in single−ended mode.
9. VIHD, VILD, VID and VCMR parameters must be complied with simultaneously.
10. VCMR min varies 1:1 with GND, VCMR max varies 1:1 with VCC. The VCMR range is referenced to the most positive side of the differential
input signal.
http://onsemi.com
5
5 Page 
NB7L572
PACKAGE DIMENSIONS
PIN ONE
LOCATION
ÉÉÉÉD
QFN32 5x5, 0.5P
CASE 488AM−01
ISSUE O
A
B
E
2 X 0.15 C
TOP VIEW
2 X 0.15 C
0.10 C
32 X 0.08 C
(A3)
SIDE VIEW A1
A
SEATING
PLANE
C
L
32 X
EXPOSED PAD
9
D2
16 17
K
32 X
8
E2
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM TERMINAL
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
MILLIMETERS
DIM MIN NOM MAX
A 0.800 0.900 1.000
A1 0.000 0.025 0.050
A3 0.200 REF
b 0.180 0.250 0.300
D 5.00 BSC
D2 2.950 3.100 3.250
E 5.00 BSC
E2 2.950 3.100 3.250
e 0.500 BSC
K 0.200 −−− −−−
L 0.300 0.400 0.500
SOLDERING FOOTPRINT*
5.30
32 X
0.63
3.20
1
32
32 X b
0.10 C A B
0.05 C
24
25
e
BOTTOM VIEW
3.20 5.30
32 X
0.28
28 X
0.50 PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Phone: 421 33 790 2910
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Phone: 81−3−5817−1050
http://onsemi.com
11
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NB7L572/D
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet NB7L572.PDF ] | |
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