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Número de pieza | ATA6833 | |
Descripción | (ATA6833 / ATA6834) BLDC Motor Driver and LIN System Basis Chip | |
Fabricantes | ATMEL Corporation | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de ATA6833 (archivo pdf) en la parte inferior de esta página. Total 27 Páginas | ||
No Preview Available ! Features
• ATA6833 Temperature Range TJ = 150°C
• ATA6834 Extended Temperature Range TJ = 200°C
• Direct Driving of 6 External NMOS Transistors with a Maximum Switching Frequency of
50 kHz
• Integrated Charge Pump to Provide Gate Voltages for High-side Drivers and to Supply
the Gate of the External Battery Reverse Protection NMOS
• Built-in 5V/3.3V Voltage Regulator with Current Limitation
• Reset Signal for the Microcontroller
• Sleep Mode with Supply Current of typically < 45 µA
• Wake-up via LIN Bus or High Voltage Input
• Programmable Window Watchdog
• Battery Overvoltage Protection and Battery Undervoltage Management
• Overtemperature Warning and Protection (Shutdown)
• 200 mA Peak Current for Each Output Driver
• LIN Transceiver Conformal to LIN 2.1 and SAEJ2602-2 with Outstanding EMC and ESD
Performance
• QFN48 Package 7 mm × 7 mm
1. Description
The ATA6833 and ATA6834 are system basis chips for three-phase brushless DC
motor controllers designed in Atmel®’s state-of-the-art 0.8 µm SOI technology
SMART-I.S.™1. In combination with a microcontroller and six discrete power MOS-
FETs, the system basis chip forms a BLDC motor control unit for automotive
applications. In addition, the circuits provide a 3.3V/5V linear regulator and a window
watchdog.
The circuit includes various control and protection functions like overvoltage and over-
temperature protection, short circuit detection, and undervoltage management.
Thanks to these function blocks, the driver fulfils a maximum of safety requirements
and offers a high integration level to save cost and space in various applications. The
target applications are most suitable for the automotive market due to the robust tech-
nology and the high qualification level. ATA6834, in particular, is designed for
applications in a high-temperature environment.
www.DataSheet4U.com
BLDC Motor
Driver and LIN
System Basis
Chip
ATA6833
ATA6834
Preliminary
9122D–AUTO–09/09
1 page 3. Functional Description
ATA6833/ATA6834 [Preliminary]
www.DataSheet4U.com
3.1 Power Supply Unit with Supervisor Functions
3.1.1
Power Supply
The IC has to be supplied by a reverse-protected battery voltage. To prevent damage to the IC,
proper external protection circuitry has to be added. It is recommended to use at least one
capacitor combination of storage and RF capacitors behind the reverse protection circuitry,
which is connected close to the VBAT and GND pins of the IC.
A fully integrated low-power and low-drop regulator (VINT regulator), stabilized by an external
blocking capacitor, provides the necessary low-voltage supply needed for the wake-up process.
A trimmed low-power band gap is used as reference for the VINT regulator as well as for the
VCC regulator. All internal blocks are supplied by VINT regulator. VINT regulator must not be
used for any external supply purposes.
Nothing inside the IC except the logic interface to the external microcontroller is supplied by the
5V/3.3V VCC regulator.
Both voltage regulators are checked by a “power-good comparator”, which keeps the whole chip
in reset as long as the internal supply voltage (VINT regulator output) is too low and generates a
reset for the external microcontroller if the output voltage of the VCC regulator is not sufficient.
3.1.2
VBatt Switch
This high-voltage switch provides the battery voltage at pin VBATSW for various purposes. It is
switched ON after power on reset when the IC transits to Active Mode and it will only turn OFF
when the IC changes to Sleep Mode. Watchdog resets do not have an effect on the switch. The
switch can be used for measuring purposes as well as to switch on external voltage regulators.
3.1.3
Voltage Supervisor
This function is implemented to protect the IC and the external power MOS transistors from
damage due to overvoltage on PBAT input. In the event of overvoltage (VTHOV) or undervoltage
(VTHUV), the external NMOS motor driver transistors will be switched off. The failure state will be
flagged on DG2 pin. It is recommended to block PBAT with an external RF capacitor to suppress
high frequency disturbances.
3.1.4
Temperature Supervisor
An integrated temperature sensor prevents the IC from overheating. If the temperature is above
the overtemperature pre-warning threshold TJPW set, the diagnostic pin DG3 will be switched to
HIGH to signal this event to the external microcontroller. The microcontroller should take actions
to reduce the power dissipation in the IC. If the temperature rises above the overtemperature
shutdown threshold TJ switch off, the VCC regulator and all output drivers together with the LIN
transceiver will be switched OFF immediately and the /RESET signal will go LOW. Both thresh-
olds have a built-in hysteresis to avoid oscillations. The IC will return to normal operation (Active
Mode) when it has cooled down below the shutdown threshold. When the junction temperature
drops below the pre-warning threshold, bit DG3 will be switched LOW.
9122D–AUTO–09/09
5
5 Page ATA6833/ATA6834 [Preliminary]
www.DataSheet4U.com
3.8 Short Circuit Detection
Short circuits in the motor bridge circuitry are sensed by S1 to S3 inputs. Internal comparators
monitor the voltage differences between the drain and the source terminals of the external
power-NMOS transistors. If one transistor switches on and its drain-source voltage exceeds VSC
threshold (typically 4V) after a blanking time tSC (typically 6 µs, see Figure 3-6), a short circuit in
this branch will be detected. In this case, all output drivers will be switched off immediately and
pin DG1 will be set to HIGH. With a rising edge at any of the pins IL1 to IL3 or IH1 to IH3, the
diagnostic output DG1will be reset and the drivers can be switched on again.
3.9 Cross Conduction Timer
In order to prevent damage of the motor bridge due to peak currents a non-overlapping phase
for switching the power-NMOS transistors is mandatory. Therefore, a cross conduction timer has
been implemented to prevent switching on any output driver for a time tCC after any other driver
has been switched off. This also accounts for toggling any other driver after a short circuit was
detected. An external RC parallel combination defines the value for tCC and can be estimated as
follows:
tCC = KCC × RCC [kΩ] × CCC [nF], KCC is specified in Section 8. “Electrical Characteristics” on
page 16.
The RC combination is connected between CC and GND pins. When one of the drivers has
been switched off the RC combination is charged to 5V (VINT) and discharged with its time con-
stant. Any low to high transition at the control inputs will be masked out at the driver outputs until
the voltage at CC pin drops below 67% of its initial value (VINT). The timer will be re-triggered at
any time by any falling edge at the control inputs. This is shown in the following figure.
Figure 3-6. Interaction of Short Circuit Detection and Cross Conduction Timer
IL1
L1
IH1
Ignore VS1
for tSC = 6 µs
Shut off
if VS1 > 4V
H1
Shut off
if VPBAT - VS1 > 4V
IL3
Ignore VPBAT - VS1
for tSC = 6 µs
L3
VCC = VVINT
CC
VCC = 67% VVINT
Ignore VS3
for tSC = 6 µs
Shut off
if VS3 > 4V
tcc tcc
tcc
9122D–AUTO–09/09
At least 5 kΩ minimum and 5 nF at maximum should be used as values for the RC combination.
10 kΩ is recommended. If the non-overlapping phase is controlled by the external microcon-
troller, it is possible to do without the external capacitor. The minimum time tCC is defined by the
parasitic capacitance at CC pin.
11
11 Page |
Páginas | Total 27 Páginas | |
PDF Descargar | [ Datasheet ATA6833.PDF ] |
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