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PDF ATA6836 Data sheet ( Hoja de datos )

Número de pieza ATA6836
Descripción Hex Half-bridge Driver
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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Features
Six Half-bridge Outputs Formed by Six High-side and Six Low-side Drivers
Capable of Switching all Kinds of Loads (Such as DC Motors, Bulbs, Resistors,
Capacitors and Inductors)
RDSon Typically 1.0Ω at 25°C, Maximum 1.8Ω at 150°C
Up to 650-mA Output Current
Very Low Quiescent Current IS < 20 µA in Standby Mode
Outputs Short-circuit Protected
Overtemperature Prewarning and Protection
Undervoltage Protection
Various Diagnosis Functions Such as Shorted Output, Open Load, Overtemperature
and Power Supply Fail
Serial Data Interface
Operation Voltage up to 40V
Daisy Chaining Possible
Serial Interface 5V Compatible, up to 2 MHz Clock Frequency
SO28 or QFN24 Power Package
1. Description
The ATA6836 is a fully protected hex half-bridge driver designed in Smart Power SOI
technology, used to control up to 6 different loads by a microcontroller in automotive
and industrial applications.
Each of the six high-side and six low-side drivers is capable of driving currents up to
650 mA. The drivers are internally connected to form 6 half-bridges and can be con-
trolled separately from a standard serial data interface. Therefore, all kinds of loads,
such as bulbs, resistors, capacitors and inductors, can be combined. The IC espe-
cially supports the application of H-bridges to drive DC motors.
Protection is guaranteed in terms of short-circuit conditions, overtemperature and
undervoltage. Various diagnosis functions and a very low quiescent current in standby
mode make a wide range of applications possible.
Automotive qualification referring to conducted interferences, EMC protection and
ESD protection gives added value and enhanced quality for the exacting requirements
of automotive applications.
www.DataSheet4U.com
Hex Half-bridge
Driver with
Serial Input
Control
ATA6836
4952F–BCD–07/09

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ATA6836 pdf
2.2 QFN24
Figure 2-2. Pinning QFN 24, 5 × 5, 0.65 mm pitch
ATA6836
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OUT4 SENSE
OUT4
VS
VS
OUT3
OUT3 SENSE
24 23 22 21 20 19
1 18
2 17
3 16
4 15
5 14
6 13
7 8 9 10 11 12
CLK
CS
GND SENSE
NC
VCC
DO
Note:
YWW
ATAxyz
ZZZZZ
AL
Date code (Y = Year above 2000, WW = week number)
Product name
Wafer lot number
Assembly sub-lot number
Table 2-2.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Description QFN24
Symbol Function
OUT4 SENSE Only for testability in final test
OUT4
Half-bridge output 4; formed by internally connected power MOS high-side switch 4 and low-side switch 4
with internal reverse diodes; short circuit protection; overtemperature protection; diagnosis for short and
open load
VS Power supply output stages HS4, HS5 and HS6
VS Power supply output stages HS1, HS2 and HS3
OUT3 Output 3; see pin 1
OUT3 SENSE Only for testability in final test
NC Internal bond to GND
OUT2 Output 2; see pin 1
OUT2 SENSE Only for testability in final test
OUT1 SENSE Only for testability in final test
OUT1 Output 1; see pin 1
INH Inhibit input; 5V logic input with internal pull down; low = standby, high = normal operation
Serial data output; 5V CMOS logic level tri-state output for output (status) register data; sends 16-bit status
DO information to the microcontroller (LSB is transferred first). Output will remain tri-stated unless device is
selected by CS = low, therefore, several ICs can operate on one data output line only
VCC Logic supply voltage (5V)
NC Internal bond to GND
GND SENSE Ground; reference potential; internal connection to the lead frame; cooling tab
4952F–BCD–07/09
5

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ATA6836 arduino
6. Operating Range
Parameter
Supply voltage
Logic supply voltage
Test Conditions
Logic input voltage
Serial interface clock
frequency
Junction temperature
range
ATA6836
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Pin SO28 Pin QFN24
5, 10
3, 4
19 14
17, 24-26 12, 17-19
Symbol
VVS
VVCC
VINH, VDI, VCLK,
VCS
fCLK
Tj
Min.
VUV(1)
4.75
–0.3
–40
Typ.
Max.
40
5.25
VVCC
2
+150
Unit
V
V
V
MHz
°C
7. Electrical Characteristics
7.5V < VS < 40V; 4.75 < VCC < 5.25V; INH = High; –40°C < Tj < 150°C; unless otherwise specified, all values refer to GND pins.
No. Parameters
Test Conditions
Pin SO28 Pin QFN24 Symbol Min. Typ. Max. Unit Type*
1 Current Consumption
VS = 33V
1.1
Total quiescent current
(VS and all outputs to
VS)
VCC = 0V or
VCC = 5V, bit SI = low or
VCC = 5V, pin INH = low
Output pins to VS and
GND
5, 10
3, 4
IVS
2 µA A
1.2
Quiescent current
(VCC)
4.75V < VVCC < 5.25V,
INH or bit SI = low
19
14
IVCC
20 µA A
1.3 Supply current (VS)
VVS < 28V normal
operation, all output
stages off
5, 10 3, 4
IVS
0.8 1.2 mA A
1.4 Supply current (VS)
VVS < 28V normal
operation, all output low 5, 10
stages on, no load
3, 4
IVS
10 mA A
1.5 Supply current (VS)
VVS < 28V normal
operation, all output
5, 10
high stages on, no load
3, 4
IVS
16 mA A
1.6 Supply current (VCC)
4.75V < VVCC < 5.25V,
normal operation
19
14
IVCC
150 µA A
1.7 Discharge current (VS) VVS = 40V, INH = low
2 Internal Oscillator Frequency
5, 10
3, 4
IVS
5 mA A
2.1
Frequency (time base
for delay timers)
fOSC
19
45 kHz A
3 Undervoltage Detection, Power-on Reset
3.1
Power-on reset
threshold
19 14
VVCC 2.3 2.7 3.0 V A
3.2
Power-on reset delay
time
After switching on VVCC
tdPor 30 95 160 µs A
3.3
Undervoltage detection
threshold
19 14
VUV 5.5
7.0 V A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1. Delay time between rising edge of input signal at pin CS after data transmission and switch on/off output stages to 90% of
final level. Device not in standby for t > 1 ms.
4952F–BCD–07/09
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