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PDF ATA8743 Data sheet ( Hoja de datos )

Número de pieza ATA8743
Descripción Microcontroller
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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General Features
Transmitter with Microcontroller Consisting of an AVR® Microcontroller and RF
Transmitter PLL in a Single QFN24 5 mm × 5 mm Package (Pitch 0.65 mm)
– f0 = 868 MHz to 928 MHz
Temperature Range –40°C to +85°C
Supply Voltage 2.0V to 4.0V Allowing Usage of Single Li-cell Power Supply
Low Power Consumption
– Active Mode: Typical 9.8 mA at 3.0V and 4 MHz Microcontroller-clock
– Power-down Mode: Typical 200 nA at 3.0V
Modulation Scheme ASK/FSK
Integrated PLL Loop Filter
Output Power of 5.5 dBm at 868.3 MHz
Easy to Design-in Due to Excellent Isolation of the PLL from the PA and Power Supply
Single-ended Antenna Output with High Efficient Power Amplifier
Very Robust ESD Protection: HBM 2500V, MM100V, CDM 1000V
High Performance, Low Power AVR 8-bit Microcontroller, Similar to Popular ATtiny44
Well Known and Market-accepted RISC Architecture
Non-volatile Program and Data Memories
– 4 KBytes of In-system Programmable Program Memory Flash
– 256 Bytes In-system Programmable EEPROM
– 256 Bytes Internal SRAM
Programming Lock for Self-programming Flash Program and EEPROM Data Security
Peripheral Features
– Two Timer/Counter, 8- and 16-bit Counters with Two PWM Channels on Both
– 10-bit ADC
– On-chip Analog Comparator
– Programmable Watchdog Timer with Separate On-chip Oscillator
– Universal Serial Interface (USI)
Special Microcontroller Features
– debugWIRE On-chip Debug System
– In-system Programmable via SPI Port
– External and Internal Interrupt Sources
– Pin Change Interrupt on 12 Pins
– Enhanced Power-on Reset Circuit
– Programmable Brown-out Detection Circuit
– Internal Calibrated Oscillator
– On-chip Temperature Sensor
12 Programmable I/O Lines
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Microcontroller
with
UHF ASK/FSK
Transmitter
ATA8743
1. General Description
The ATA8743 is a highly flexible programmable transmitter containing the AVR micro-
controller ATtiny44V and the UHF PLL transmitters in a small QFN24 5 mm × 5 mm
package. This device is a member of a transmitter family covering several operating
frequency ranges, which has been specifically developed for the demands of RF
low-cost data transmission systems with data rates of up to 32 kBit/s. Its primary appli-
cations are in the areas of industrial/aftermarket Remote Keyless-Entry (RKE)
systems, alarm, telemetering, energy metering systems, home automotion/entertain-
ment and toys. The ATA8743 can be used in the frequency band of f0 = 868 MHz for
ASK or FSK data transmission.
9152A–INDCO–07/09

1 page




ATA8743 pdf
2.1 Pin Configuration of RF Pins
Table 2-2. Pin Description
Pin
Symbol
Function
Configuration
ATA8743
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VS
Clock output signal for micro con roller
8 CLK The clock output frequency is set by the
crystal to fXTAL/4
100Ω
100Ω
CLK
9
PA_ENABLE
Switches on power amplifier.
Used for ASK modulation
10
ANT2
Emitter of antenna output stage.
11
ANT1
Open collector antenna output.
20
XTAL
Connection for crystal.
PA_ENABLE 50 kΩ
20 µA
UREF = 1.1V
ANT1
ANT2
VS VS
1.5 kΩ 1.2 kΩ
XTAL
182 µA
9152A–INDCO–07/09
5

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ATA8743 arduino
ATA8743
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7. Electrical Characteristics (Continued)
VS = 2.0V to 4.0V, Tamb = 25°C unless otherwise specified.
Typical values are given at VS = 3.0V and Tamb = 25°C. All parameters are referred to GND (pin 7).
Parameters
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
Phase noise of phase comparator
Referred to fPC = fXT0,
25 kHz distance to carrier
–116 –110 dBc/Hz
In-loop phase noise PLL
25 kHz distance to carrier
–80 –74 dBc/Hz
Phase noise VCO
at 1 MHz
at 36 MHz
–89
–120
–86 dBc/Hz
–117 dBc/Hz
Frequency range of VCO
Clock output frequency (CMOS
microcontroller compatible)
fVCO
868
928 MHz
f0/256
MHz
Voltage swing at pin CLK
CLoad 10 pF
Series resonance R of the crystal
V0h VS × 0.8
V0l
Rs
VS × 0.2
110
V
V
Ω
Capacitive load at pin XT0
7 pF
FSK modulation frequency rate Duty cycle of the modulation signal = 50% 0 32 kHz
ASK modulation frequency rate Duty cycle of the modulation signal = 50% 0 32 kHz
ENABLE input
Low level input voltage
High level input voltage
Input current high
VIl
VIh
IIn
PA_ENABLE input
Low level input voltage
High level input voltage
Input current high
VIl
VIh
IIn
Note: 1. If VS is higher than 3.6V, the maximum voltage will be reduced to 3.6V.
1.7
1.7
0.25
20
0.25
VS(1)
5
V
V
µA
V
V
µA
9152A–INDCO–07/09
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