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PDF AS1529 Data sheet ( Hoja de datos )
| Número de pieza | AS1529 | |
| Descripción | Single Ended or Differential | |
| Fabricantes | austriamicrosystems AG | |
| Logotipo |  |
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Datasheet
www.DataSheet4U.com
AS1528/AS1529
Micro-Power, 10-Bit, 150ksps, ADC, Single Ended
or Differential
1 General Description
2 Key Features
The AS1528/AS1529 are low-power, 10-bit analog-to-
digital converters (ADCs) designed to operate with a sin-
gle +2.7V to +5.25V supply. Excellent dynamic perfor-
mance, low power consumption, and simplicity make
these devices perfect for portable battery-powered data-
acquisition applications.
The devices are available as the standard products
listed in Table 1.
Table 1. Standard Products
Model
Input Type
Input Voltage
AS1528
1-Channel, Pseudo /
True-Differential
0 to VREF /
-VREF/2 to VREF/2
AS1529
2-Channel, Single-
Ended
0 to VREF
! Single-Supply Operation: +2.7V to +5.25V
! Automatic Shutdown Between Conversions
! Low Power Consumption
- 350µA @ 150ksps
- 245µA @ 100ksps
- 24µA @ 10ksps
- 2.5µA @ 1ksps
- 200nA in Automatic Shutdown Mode
! True-Differential Track/Hold, 150kHz Sampling Rate
Software-Configurable Unipolar/Bipolar Conversion
(AS1528)
The devices feature a successive-approximation regis-
ter (SAR), automatic shutdown, fast wakeup (1.4µs),
and low-power consumption at the maximum sampling
rate of 150ksps.
Automatic shutdown (0.2µA) between conversions
results in reduced power consumption (at slower
throughput rates).
Data access are made via an external clock through the
SPI-/QSPI-/MICROWIRE-compatible 3-wire high-speed
serial interface.
The AS1529/AS1528 are available in a 8-pin TDFN
(3x3mm) package.
Figure 1. AS1528/AS1529 - Block Diagram
! Input Common Mode Range from GND to VDD
! 3-Wire SPI-/QSPI-/MICROWIRE-Compatible Serial
Interface
! Internal Conversion Clock
! 8-pin TDFN (3x3mm) Package
3 Applications
The devices are ideal for remote sensors, data-acquisi-
tion, data logging devices, lab instruments, or for any
other space-limited A/D devices with low power con-
sumption and single-supply requirements.
1
VDD
7
CNVST
8
SCLK
2
AIN1/AIN+
2
AIN2/AIN-
4
REF
AS1528/AS1529
Input
Shift
Register
Osc
Control
Logic
Track/
Hold
10-Bit
SAR
6
DOUT
5
GND
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Revision 1.02
1 - 21
1 page  
AS1528/AS1529
Datasheet - Electrical Characteristics
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6 Electrical Characteristics
VDD = +2.7 to +5.25V, VREF = +2.5V, 4.7µF Capacitor at REF; fSCLK = 8MHz (50% Duty Cycle); AIN- = GND (AS1528)
TAMB = TMIN to TMAX (unless otherwise specified). Typical Values at TAMB = +25ºC. Unipolar Mode (AS1528).
Table 4. Electrical Characteristics
Symbol
Parameter
Condition
Min Typ Max Unit
DC Accuracy
Resolution
10 Bits
INL Relative Accuracy
±0.275 LSB
DNL
Differential Non-Lineraity No Missing Codes Over Temperature
±0.275 LSB
Offset Error
±0.25 ±2 LSB
Gain Error 1
±0.25 ±2 LSB
Gain Temp Coefficient
±0.3 ppm/ºC
Offset Temp Coefficient
±0.3 ppm/ºC
Channel-to-Channel Offset
Match
±0.025
LSB
Channel-to-Channel Gain
Match
±0.025
LSB
Dynamic Specifications – (fIN (sinewave) = 10kHz, VIN = 2.5VP-P, 150ksps, fSCLK = 8MHz (50% duty cycle), AIN- =
GND (AS1528)
SINAD Signal-to-Noise Plus Distortion
61.5 dB
THD
Total Harmonic Distortion (to
the 5th Harmonic)
-79.5
dB
SFDR Spurious-Free Dynamic Range
84 dB
Full Power Bandwidth
-3dB Point
20 MHz
Full Linear Bandwidth
-0.1dB Point
400 kHz
Conversion Rate
tCONV
Conversion Time
Exclusive of tACQ
3.3 3.7
µs
tACQ Track/Hold Acquisition Time
1.4 µs
Aperture Delay
30 ns
fSCLK Max Serial Clock Frequency
8 MHz
Serial Clock Duty Cycle
30 70 %
Analog Input
VIN Range 2
Unipolar
Bipolar
0
-VREF/2
VREF
VREF/2
V
Input Leakage Current
No Channel Selected or Conversion
Halted
±0.01 ±1
µA
Input Capacitance
Track Mode
Hold Mode
20 pF
5 pF
External Reference Input
VREF
VIN Range
1.0
VDD +
50mV
V
VREF = +2.5V @ 150ksps
11 25
IREF Input Current
VREF = +4.096V @ 150ksps
19 µA
Acquisition Between Conversions
0 +2 +5
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Revision 1.02
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5 Page 
AS1528/AS1529
Datasheet - Detailed Description
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Figure 18. Single Conversion – AIN1 vs. GND (AS1529), Unipolar Mode AIN+ vs. AIN- (AS1528)
tACQ
CNVST
tCONV
Sampling Instant
SCLK
14
8 12
DOUT High Z
B9
MSB
B8
B7 B6
B5 B4 B3 B2
B1
B0
LSB
ZERO ZERO
High Z
If AIN2 is selected (see Figure 19), drive CNVST high for at least 30ns. Next, drive CNVST low for at least 30ns, and
then high again. This powers up the AS1529 and places the track/hold circuitry in track mode with AIN2 connected to
the positive input capacitor. Next hold CNVST high for tACQ to fully acquire the signal. Drive CNVST low to place the
track/hold circuitry in hold mode. The AS1529 then performs a conversion and shuts down automatically. The MSB is
available at DOUT after 3.7µs. Data can then be clocked out using SCLK.
Note: If all 12 bits of data are not clocked out before CNVST is driven high, AIN2 is selected for the next conversion.
Selecting Unipolar or Bipolar Conversions (AS1528)
True-differential conversion (with the AS1528 unipolar and bipolar modes) is selected using pin CNVST (see page 3).
AIN+ and AIN- are sampled at the falling edge of CNVST. In unipolar mode, AIN+ can exceed AIN- by up to VREF. The
output format is straight binary. In bipolar mode, either input can exceed the other by up to VREF/2. The output format is
two’s complement. In both modes, the input common mode range can go from GND to VDD.
Figure 19. Single Conversion – AIN2 vs. GND (AS1529), Bipolar Mode AIN+ vs. AIN- (AS1528)
CNVST
tACQ
tCONV
Sampling Instant
SCLK
DOUT High Z
14
8 12
B9
MSB
B8
B7
B6
B5
B4
B3
B2
B1
B0
LSB
ZERO ZERO
High Z
Note: In unipolar and bipolar modes, AIN+ and AIN- must not exceed VDD by more than 50mV or be lower than GND
by more than 50mV.
If unipolar mode is selected (see Figure 18), drive CNVST high to power up the AS1528 and place the track/hold cir-
cuitry in track mode with AIN+ and AIN- connected to the input capacitors. Hold CNVST high for tACQ to fully acquire
the signal. Drive CNVST low to place the track/hold circuitry in hold mode. The AS1528 then performs a conversion
and shutdown automatically. The MSB is available at DOUT after 3.7µs. Data can then be clocked out using SCLK.
Clock out all 12 bits of data before driving CNVST high for the next conversion. If all 12 bits of data are not clocked out
before CNVST is driven high, bipolar mode is selected for the next conversion.
If bipolar mode is selected (see Figure 19), drive CNVST high for at least 30ns. Next, drive CNVST low for at least
30ns and then high again. This places the track/hold circuitry in track mode with AIN+ and AIN- connected to the input
capacitors.
Next hold CNVST high for tACQ to fully acquire the signal. Drive CNVST low to place the track/hold circuitry in hold
mode. The AS1528 then performs a conversion and shuts down automatically. The MSB is available at DOUT after
3.7µs. Data can then be clocked out using SCLK.
Note: If all 12 bits of data are not clocked out before CNVST is driven high, bipolar mode is selected for the next con-
version.
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Revision 1.02
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| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet AS1529.PDF ] | |
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